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469 Commits

Author SHA1 Message Date
Henrik Rydgard
89ddbb51bb Oops, XMM0 might be taken by temps. Also, s/GC_ALIGN16/MEMORY_ALIGN16 2013-08-10 23:39:24 +02:00
Henrik Rydgard
4c6006190f Of course, found the real bug causing #3117 immediately after the revert. Fixed. 2013-08-10 23:32:12 +02:00
Henrik Rydgard
0dac2b4783 Update native, minor UI stuff and cleanups 2013-08-10 23:04:23 +02:00
Henrik Rydgard
394f590c36 Failed attempt at implementing vsge/vslt. Dunno what's wrong but disabled for now. 2013-08-10 18:39:27 +02:00
Henrik Rydgard
174223c42b Fix VCMP (VC_TR) and optimize a little 2013-08-08 21:03:40 +02:00
Henrik Rydgard
8714240519 Fix vf2i properly on x86. 2013-08-07 21:30:57 +02:00
Henrik Rydgard
dce3c9449b Attempt to quickfix vf2i but failed, so disabling it. Should fix #3084 2013-08-07 18:07:49 +02:00
Henrik Rydgard
201282f28c JIT: Implement vf2i (truncate mode only) 2013-08-06 19:08:15 +02:00
Henrik Rydgard
c71b304ba1 Fix a classic bug again (now in armjit), + a minor opt 2013-08-06 15:22:19 +02:00
Henrik Rydgard
1d81698728 JIT (both): Implement VCMOV 2013-08-06 13:29:17 +02:00
Henrik Rydgard
d2c9919573 Vcmp: Fix ARM, optimize x86 slightly 2013-08-06 11:49:10 +02:00
Henrik Rydgard
2f0cdc6988 ARMJIT: disable vi2f, it seems buggy. preliminary disabled impl of vcrsp.t. 2013-08-06 11:10:26 +02:00
Henrik Rydgard
4e8958f42d A small optimization, a few jit stubs, and cross/quat product on x86. 2013-08-01 00:15:08 +02:00
Henrik Rydgard
76ae643335 Cleanup 2013-07-31 22:42:51 +02:00
Henrik Rydgard
c86dc7279e JIT: Implement VCMP in both JITs. Only the x86 one is tested and enabled. 2013-07-31 22:29:16 +02:00
Henrik Rydgard
7fc5ce56de Fix viim for x86, implement for ARM. 2013-07-31 18:21:23 +02:00
Henrik Rydgard
0a8f85a919 Some JIT cleanup, implement VI2F on ARM. also disabled untested impl of viim for x86. 2013-07-31 17:27:04 +02:00
Henrik Rydgard
51596b636a Fix numerous ARM JIT bugs. Activate vmtvc and vscl, and vadd/vmul/vdiv/vsub for real this time. 2013-07-31 10:34:58 +02:00
Henrik Rydgard
9ac511f191 Don't check vector size in vfim (nonsense). implement for arm. minor fix. 2013-07-30 22:34:12 +02:00
Henrik Rydgard
e93c2abe27 x86 jit: implement vfim. Move some stuff to native. cleanup for armjit logging 2013-07-30 22:28:05 +02:00
Henrik Rydgard
ee215cc316 ARMJIT: Fix eatprefix, add DirtyInInV mapping, misc stuff 2013-07-30 18:15:48 +02:00
Henrik Rydgard
d8294f025f More VFPU stuff (nothing new activated) 2013-07-30 01:09:11 +02:00
Henrik Rydgard
3b9e6243eb Only flush the required registers on function calls (only implemented for real on ARM) 2013-07-28 22:21:43 +02:00
Henrik Rydgard
3341e7e7fc Fix VROT on 32-bit x86 2013-07-28 22:20:32 +02:00
Henrik Rydgard
6ecd0194fa Implement VROT in both JITs, as it's heavily used by a few games. 
Another ~1-3% in FF:CC.
 2013-07-28 18:22:12 +02:00
Henrik Rydgard
daaed2183f Jit x86: Implement vhdp 2013-07-28 18:22:11 +02:00
Henrik Rydgard
8feeaf2e7a Jit: Implement vidt in both, plus translate a couple easy ones to ARM. 2013-07-28 16:14:21 +02:00
Henrik Rydgard
59644ad59b Jit: Implement VMMUL for ARM, optimize the x86 implementation. Also add VCST. 2013-07-28 12:14:35 +02:00
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b307d77b61 Oops, need to still rewind on breakpoint. 2013-07-27 15:05:16 -07:00
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1a9b190188 Treat CORE_NEXTFRAME like CORE_RUNNING is bps. 
Fixes some cases where breakpoints skip instructions incorrectly.
 2013-07-27 13:26:43 -07:00
Henrik Rydgard
afcb5add51 Minor code cleanup/reindent around ARM jit 2013-07-27 22:14:01 +02:00
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286c153c6a Fix memchecks for halfwords and bytes. 
Before it was doing the range on a 4 byte read, which would trip a
memcheck that wasn't actually being hit if the byte of halfword was
unaligned.
 2013-07-06 13:15:48 -07:00
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25cc09b81b Improve perf when ignore illegal is off. 
Most users will have it on, but this improves perf a bit when it isn't.
 2013-07-06 13:04:19 -07:00
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77670876cd Fix memcheck range intersect check. 2013-07-06 12:08:34 -07:00
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2b4344f61d Don't rewind the PC on memcheck w/ CORE_NEXTFRAME. 
If the memcheck doesn't hit, we'll still rewind the PC, causing weirdness.
This is likely if you try to memcheck an address hit first thing in a
vblank interrupt handler or something.
 2013-07-06 03:30:21 -07:00
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2d15eb2acd Re-enable lwl/lwr/swl/swr on the x86 jit. 
Now correctly handling ECX on x64.
 2013-07-06 01:21:52 -07:00
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662ae77214 Save regs before/after 3-arg func calls on x86. 
This fixes bugs only on x64 when ABI_CallFunctionACC and etc. were used.
This was breaking things since R8 was not being saved (arg 3.)
 2013-07-06 00:54:53 -07:00
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19f2b35679 Keep the stack aligned when tripping memchecks. 2013-07-06 00:22:09 -07:00
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1c9086617a DISABLE the swr/swl and friends for now. 
Broke Disgaea on x64 only, not sure why right now.
 2013-07-05 02:53:15 -07:00
Henrik Rydgård
abc03520b4 Merge pull request #2625 from unknownbrackets/debugger 
Fix some memcheck bugs
 2013-07-05 02:26:13 -07:00
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5271f36d78 Output less code per memcheck. 
Somehow this also fixed a bug with memchecks that didn't hit, but I don't
know why.  Reverting and making them far jumps doesn't help.... strange.

Anyway, this should be less code which is good.
 2013-07-05 01:33:39 -07:00
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c64f6c3f39 Don't just forget other memchecks, arg. 2013-07-05 01:26:02 -07:00
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540bd13222 Correctly match ranges in memchecks with ends. 2013-07-05 01:16:57 -07:00
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3278b5e373 Handle the immediate case of clz/clo. 2013-07-04 23:07:42 -07:00
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d823989330 Implement vmone/vmzero/vmidt for the x86 jit. 2013-07-04 18:16:57 -07:00
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654490566f Implement clz/clo in x86 jit. 2013-07-04 18:01:17 -07:00
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e27ab6fa11 Add swl/swr to the x86 jit. 2013-07-04 17:34:56 -07:00
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203daf955b Implement lwl/lwr in the x86 jit. 2013-07-04 17:30:36 -07:00
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2d25d1eb05 Add a way to force alignment in JitSafeMem(). 2013-07-04 15:59:12 -07:00
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942d50d521 When hitting go on a memcheck, also skip it. 
If you hit go you most likely want it to continue past the instruction you
were on.
 2013-06-30 16:35:48 -07:00
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8ee88ae5a2 Don't skip memcheck'd op when illegal reads is off. 2013-06-30 16:35:48 -07:00
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9209a30d9b Add skeleton for conditional breakpoints. 2013-06-30 16:35:47 -07:00
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6bd4383a8a Give memchecks/breakpoints a consistent interface. 
Removes the limit on max breakpoints, and makes everything use accessors
for both that look roughly the same.
 2013-06-30 15:16:58 -07:00
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c9c3bc83e4 Log more info about branches in delay slots. 2013-06-30 13:19:27 -07:00
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84f65dc961 Save flags around conditional breakpoint check. 2013-06-29 11:45:29 -07:00
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609f8d6340 Allow hitting Go on a breakpoint to continue. 
Doesn't work for branches though, because of delay slots.
 2013-06-29 11:23:24 -07:00
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aaafd372e9 Clear temp breakpoints off the CPU thread. 
This should make it possible to actually clear them.  Fixes #2519.
 2013-06-29 10:54:33 -07:00
Henrik Rydgard
ce2c18d2fe Remove redundant vmov instructions (seen in wipeout) 2013-06-15 00:19:48 +02:00
Sacha
a26b48fc0b Stub wsbh/wsbw for x86. 2013-06-05 14:55:01 +10:00
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2cd8f928a7 Just disable the this constructor warning here. 2013-05-31 23:14:27 -07:00
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5595146f56 Add reporting for jumps in delay slots. 2013-05-26 20:30:14 -07:00
Henrik Rydgard
f20e00315d Add basic support for the second analog stick present in the PS3 PSP emu for HD remakes. 
Make vi2f safer.
 2013-04-28 22:15:33 +02:00
Henrik Rydgard
b603214777 Also implement vcst in x86 jit 2013-04-27 22:00:09 +02:00
Henrik Rydgard
bac7e87125 Add support for vi2f to x86 JIT 2013-04-27 21:46:00 +02:00
Henrik Rydgard
1a1c161a0d Implement vmin/vmax in x86 jit, slots right into VecDo3 2013-04-27 20:52:42 +02:00
Henrik Rydgard
6f4ad05582 Remove some unused code, add some stubs to vfpu jit, some cleanup 2013-04-27 19:35:42 +02:00
Henrik Rydgard
2a39a3b972 JIT: Get rid of one memory access per dispatch, and get rid of blockcodepointers. 2013-04-27 01:32:03 +02:00
Henrik Rydgard
9eace8a80e Combine the two JitCache implementations (x86, ARM) into one. 2013-04-27 01:32:03 +02:00
Henrik Rydgard
8a904fe478 Some JIT cleanup 2013-04-27 01:32:02 +02:00
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3bb5651ca7 Initial x86 jit for vtfm/vhtfm. 2013-04-20 01:52:06 -07:00
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9245490b53 Initial / simple vmscl for x86 jit. 2013-04-20 01:34:16 -07:00
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29109d25af Non-optimal vmmul for x86 jit. 
It's faster than interpreter anyway, but it could be much better.
 2013-04-20 01:15:15 -07:00
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cfac7324d6 Implement vscl in the x86 jit. 2013-04-20 01:15:14 -07:00
Henrik Rydgard
e3fb88de68 Background thread for icon loading, show in game list. Switch to GNU STL in Android port. 2013-04-13 21:24:07 +02:00
Henrik Rydgard
81444c92a1 win32-gl-ui: Cleanup 2013-03-29 21:21:27 +01:00
Henrik Rydgard
724a600381 Buildfix android, misc other fixes, some include cleanup 2013-03-29 20:55:32 +01:00
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e4223dbcb0 Simplify adding report messages, add a bunch more. 2013-03-26 00:54:00 -07:00
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ed76563973 Don't bother checking nice, just do it after. 2013-03-11 02:18:27 -07:00
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b5fe67eb3d If the out is RA, delay slot isn't nice for jal. 
Fixes Phantasy Star Portable 2 in jit.
 2013-03-11 02:14:38 -07:00
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9cf2bcd06c Fix register memcheck to respect offset. 2013-03-09 09:01:23 -08:00
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d051ea3106 Flush when checking for memcheck coreStates. 
Trouble is this has to be done outside the lock.  So, moved out.
 2013-03-09 02:41:50 -08:00
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a926ef6776 Respect read/write only mem breakpoints in x86 jit. 2013-03-09 02:41:49 -08:00
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15ff927d4d And now the dynamic memory breakpoints in x86 jit. 
And add notes that this is interpreter/HLE only for now.
 2013-03-09 02:41:49 -08:00
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68aaac25c6 Use unsigned compares in slowmem x86 jit. 2013-03-09 02:41:48 -08:00
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d10bdd6938 Basic working imm mem breakpoints in x86 jit. 
Seems to work okay.  Doen't cover HLE of course.
 2013-03-09 02:41:48 -08:00
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6290b67984 Validate the full memory access is valid. 
Probably barely matters, but since we have the size now anyway...
 2013-03-09 02:41:47 -08:00
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4908fb8046 Don't trip in a delay slot for bad mem access. 
Could've done some tricky things... we don't jump correctly then.
 2013-03-09 02:41:47 -08:00
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2d6a730cac Add some basics for memory checks to x86 jit. 
Specifically, we will need to be able to bail in delayslots,
and we will need to know the size of the access (useful anyway.)
 2013-03-09 02:41:46 -08:00
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c4ab0855b4 Make sure interpreter and jit savestates match. 2013-03-08 08:49:21 -08:00
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028e85dc92 Cleanup some differences between the two jits. 2013-03-07 02:08:44 -08:00
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669600bd8a Minor cleanup. 2013-03-07 02:08:44 -08:00
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ac1209204c Add some reporting for CPU related stuff. 2013-03-04 00:01:41 -08:00
Henrik Rydgard
1e3a00ee9d armjit: implement vzero, vone. Use vmla for dot product. 2013-03-03 20:56:22 +01:00
Henrik Rydgard
516ca8a0c4 Merge branch 'master' into armjit-fpu 
Conflicts:
	Core/MIPS/ARM/ArmJit.h
	Core/MIPS/x86/CompVFPU.cpp
	GPU/GLES/Framebuffer.cpp
 2013-02-28 23:56:28 +01:00
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64c42ffaf2 Fix some warnings generated by clang. 2013-02-24 10:23:31 -08:00
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3fbb5d4388 Avoid using CALL() directly in case of far calls. 
This mainly matters for x64.
 2013-02-24 00:12:55 -08:00
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7eb9af271b Fix downcount check without fastmem in jr. 2013-02-23 14:30:24 -08:00
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2164a7fdf9 Keep track of whether we're in the runloop or not. 2013-02-23 13:01:00 -08:00
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313ffdb495 Add a stub for clz/clo in x86 jit. 2013-02-21 01:25:02 -08:00
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08923c092b Implement ins and ext in the x86 jit. 2013-02-21 01:25:01 -08:00
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dede852c03 Optimize out slti in the x86 jit. 
I'm kinda surprised this actually happens...
 2013-02-21 01:25:01 -08:00
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abde404c00 Optimize out some addu/etc. calls against imms. 2013-02-21 01:25:01 -08:00
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9e479b4391 Optimize addi/addiu to just LEA when possible. 2013-02-21 01:25:00 -08:00
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2db368c29a Add more imm handling for shifts in x86 jit. 
This is actually hit, and propagates more imms through.
 2013-02-21 01:25:00 -08:00
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958d95a029 Make bitrev use less instructions in the x86 jit. 
Much less.
 2013-02-20 13:43:17 -08:00
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7b612cf28d Don't need this with the imm code path. 2013-02-20 12:16:57 -08:00
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c8f85ace41 Implement bitrev in x86 jit + some imms. 2013-02-20 12:09:02 -08:00
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c3be50acbb Implement movz/movn in the x86 jit. 2013-02-20 12:09:01 -08:00
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0d6d58fed4 Add min and max to the x86 jit portfolio. 2013-02-20 12:09:01 -08:00
Henrik Rydgard
5a09885a59 Port over much of unknown's vfpu jit work to arm. Untested. 2013-02-20 00:04:21 +01:00
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038394b081 Divide from -1.0 directly in x86 jit vnrcp. 2013-02-19 00:35:15 -08:00
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a438791e7c Initial (very inefficient) vmmov for x86 jit. 
This makes #464 work (at least LittleBigPlanet), but only in x86 jit.
 2013-02-18 23:21:18 -08:00
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b8e2177591 Jit vzero/vone, which are easy and common (x86.) 2013-02-18 22:15:47 -08:00
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a001b8b6f0 Tweak and note vsat0/vsat1 NaN handling. 2013-02-18 22:06:49 -08:00
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40b2a8dec1 Drop the sign in vsqrt, but not vrsq. 2013-02-18 21:46:33 -08:00
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2e6f0006fd Oops, correct the bounds check. 2013-02-18 20:43:43 -08:00
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a3eba1e96e Fix typo, should definitely be VX(). 2013-02-18 20:43:43 -08:00
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2dfdf3ffeb Implement Comp_VV2Op vfpu ops in the x86 jit. 
Also, some cleanup.  No need for this extra boilerplate, simplify...

This makes the Bink video issue slightly better, in jit only.
 2013-02-18 20:43:28 -08:00
Henrik Rydgard
e32721c72a Merge branch 'master' into armjit-fpu 
Conflicts:
	Core/MIPS/MIPSVFPUUtils.cpp
	Core/MIPS/x86/CompVFPU.cpp
	GPU/GLES/VertexDecoder.cpp
 2013-02-19 00:50:33 +01:00
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dacbcbdf2b Add a MIPSTables flag for ignoring the prefix. 2013-02-18 01:23:15 -08:00
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afb7c0b83c Assume prefixes start default until proven wrong. 
Currently this means nothing since the MIPSTables flags are wrong.
It will blow the cache once, after the first vfpu op.
 2013-02-18 01:14:57 -08:00
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0bfc380575 Try to reuse temp regs for better caching. 2013-02-18 00:32:42 -08:00
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6855398add Support known prefixes in the vfpu jit. 2013-02-18 00:11:58 -08:00
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8ea59990ab Make applying prefixes mostly automatic. 
And implement (hopefully) D prefixes.
 2013-02-18 00:11:57 -08:00
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18c03d0816 Handle temp regs better, no need for direct access. 2013-02-18 00:11:57 -08:00
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27942606ad Use prefixD directly in jit, just like interp now. 2013-02-17 22:46:34 -08:00
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08a42a1aaf Preserve orig regs when applying vfpu prefixes. 2013-02-17 22:37:56 -08:00
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d63548799b Add more temp regs, allow swapping if necessary. 2013-02-17 22:18:46 -08:00
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7fee4dfd13 Re-enable vdot and vadd/etc. in x86 jit. 2013-02-17 17:53:53 -08:00
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f532951331 Automatically eat prefixes in x86 jit. 
Simplifies the code and makes it easier to know they're eaten
even for ops not yet jitted.
 2013-02-17 17:53:53 -08:00
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6191017a2c Fix jit VDot mapping vd incorrectly to a quad. 2013-02-17 17:52:59 -08:00
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106cbcfc5d Fix possible overlap issue in VDot. 2013-02-16 21:26:32 -08:00
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0fdc975fde Fix wrong type in x86 jit fpu/vfpu load store. 2013-02-16 20:22:08 -08:00
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6eae8ed36a Disable VDot and Vec3 in x86 jit, broke things. 2013-02-16 19:57:35 -08:00
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b27701ac7d Fix VDot returning -0.0 in x86 jit. 2013-02-16 10:37:42 -08:00
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1c4c5e718b Optimize VDot and VecDo3 to avoid temporaries. 2013-02-16 10:19:05 -08:00
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0bd382c518 Discard temp regs right away, some helper funcs. 2013-02-16 10:18:13 -08:00
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0d5da967eb Enable VDot and Vec3 in x86 jit. 2013-02-16 03:27:48 -08:00
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35537b3c97 Add TEMP0 fpu regs to x86 like in armjit. 
But... will probably need more and the ability to swap into memory
if we want to deal with prefixes.
 2013-02-16 03:27:03 -08:00
Henrik Rydgard
909b768f47 Don't need separate variables for writemask. Some optimizations. 2013-02-16 09:28:55 +01:00
Henrik Rydgard
b8abb77eee More armjit-fpu work - dot product working for example. Add some non working DISABLEd stuff too. 2013-02-16 09:27:48 +01:00
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be8ddf12aa Don't go out of bounds applying vfpu swizzle. 2013-02-15 23:43:40 -08:00
Henrik Rydgard
0ee7578d68 Merge branch 'master' into armjit-fpu 2013-02-15 23:09:59 +01:00
Henrik Rydgard
d22e258943 Don't need separate variables for writemask. Some optimizations. 2013-02-15 22:56:38 +01:00
Henrik Rydgard
44e4ba8772 Merge branch 'master' into armjit-fpu 2013-02-15 21:42:44 +01:00
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e42e7bf22e Don't flush all regs in mfvc, just prefixes. 2013-02-15 09:50:07 -08:00
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f95e66eb98 Forget cached prefixes when calling generic. 
It may eat them, or maybe always does?
 2013-02-15 08:35:34 -08:00
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2b441f1638 Initial implementation of jit vadd/vsub/vdiv/vmul. 2013-02-15 08:35:34 -08:00
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b9506c9568 Minor cleanup for vdot in x86 jit. 2013-02-15 08:35:34 -08:00
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ccad259ae5 Keep track of VFPU prefixes and flush them in jit. 2013-02-15 08:35:33 -08:00
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f6f2927526 Add curlies around DISABLE/CONDITIONAL_DISABLE. 2013-02-15 08:35:33 -08:00
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4eca76e0cc Check for s/t/d prefix reg changes in jit. 2013-02-14 00:27:09 -08:00
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3b58cc27bd Oops, vfpu was missing CONDITIONAL_DISABLEs. 2013-02-14 00:27:09 -08:00
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abe390e6f3 Add some checks for fpu/vfpu writing to $0. 2013-02-14 00:27:09 -08:00
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4789a8e5eb Oops, can't have CONDITIONAL_DISABLE here, no op. 2013-02-14 00:27:08 -08:00
Henrik Rydgard
30318a4a4d Merge branch 'master' into armjit-fpu 
Conflicts:
	Core/MIPS/x86/CompFPU.cpp
 2013-02-13 20:47:41 +01:00
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f1386dfca1 Add a quick optimization to the x86 fpu comps. 2013-02-13 02:21:26 -08:00
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19cc652a37 Correct NaN handling in fpu comparisons. 2013-02-13 01:54:07 -08:00
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3cab6986c5 Jit the FPU comparisons on x86. 
Probably not too fast.  Also, NaN handling seems wrong?
 2013-02-13 00:55:10 -08:00
Henrik Rydgard
2c01b36585 Some FPU optimization 2013-02-12 00:58:31 +01:00
Henrik Rydgard
4eb89e6aec Merge branch 'master' into armjit-fpu 2013-02-11 19:22:14 +01:00
Henrik Rydgard
3ce4a8a719 Allow switching 2xSSAA on and off ingame. Add Show FPS menu option. 2013-02-11 19:02:38 +01:00
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7c428bfeba Fix immediate div CMP. 2013-02-10 10:02:55 -08:00
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e0ebfd2211 Jit div/divu in x86. 2013-02-10 09:36:41 -08:00
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9bb78ce2ec Jit madd/msub in x86. 2013-02-10 08:45:35 -08:00
Henrik Rydgard
3a11b030d6 Merge branch 'master' into armjit-fpu 
Conflicts:
	Core/MIPS/ARM/ArmCompFPU.cpp
	Core/MIPS/x86/CompFPU.cpp
 2013-02-10 15:57:16 +01:00
Henrik Rydgard
f75d14d3b5 ARM FPU jit work 2013-02-10 15:53:56 +01:00
Henrik Rydgard
78923f5538 Jit a little more (vfpu single load/store, transfer instructions) 2013-02-10 12:14:55 +01:00
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eb84c2f00a Validate jumps in jit slowmem mode. 
This makes it easier to see what is going on in the emulator debugger.
 2013-02-09 23:11:26 -08:00
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71c85ccf33 In jit slowmem, verify actual address. 
Oops, it could crash if it was near the boundary.
Well, it still could if it were very near, but that's rare.
 2013-02-09 23:08:57 -08:00
Henrik Rydgard
377c94b125 JIT x86: cvt.s.w 2013-02-06 20:29:49 +01:00
Lewis Robbins
442e64cd84 compiler warning and const top-level const 2013-02-05 17:54:29 +00:00
lioncash
025a1351b4 Get rid of unused iterators. 
Also fix the formatting in 3 sprintf calls.
 2013-02-04 08:49:58 -05:00
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6bee870ac9 Fix CompShiftVar for x86 jit. 
In case rd == rs, need to load ECX first.  I can't find anything
else wrong with it for it to be disabled.
 2013-02-02 14:02:07 -08:00
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f777c872e6 Jit unaligned reads/writes. 
This mostly just improves perf on debug, not really on the map for release.
 2013-02-02 13:12:34 -08:00
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bab7947be6 Read delay slots as instructions not mem. 
Just in case - could be a jump target, maybe?  Never seen it, though.
 2013-02-02 11:46:35 -08:00
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44b5adeaac Properly jit the break instruction. 
Otherwise, it just keeps on going past it.
We never want to hit this anyway, but it's good to know if we do.
 2013-02-01 00:49:14 -08:00
Henrik Rydgard
c97f63a9d9 Minor armjit opt 2013-01-30 20:01:42 +01:00
Henrik Rydgard
90b11bba37 Implement mult, multu, mflo/hi, mtlo/hi in x86 JIT 2013-01-29 00:48:42 +01:00
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6d7a8d9b1a Apply the memview mask to jit immediates too. 2013-01-26 23:54:43 -08:00
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a7b5433ba7 Make sure fastmem isn't confused by rs changing. 2013-01-26 23:18:50 -08:00
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a89d61463e Make the VFPU jit use far jumps for memory access. 2013-01-26 23:08:19 -08:00
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0e8e9697c5 Add lv.q/sv.q support to the x86 jit. 2013-01-26 10:09:18 -08:00
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b77ce99d01 Oops, no slow read for immediates usually. 2013-01-26 09:27:52 -08:00
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9cd5836b85 Rename WriteFinish() to Finish() is safe mem. 
It's nothing to do with writing.
 2013-01-26 09:09:47 -08:00
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3e419f513a Refactor jit safe memory reads without dup code. 
But, maybe too automagical...
 2013-01-26 08:42:34 -08:00
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b7ef3e7bef Make sure to log / check bad immediate mem access. 
Although, theoretically, this should never happen.
Also, definitely time to refactor.
 2013-01-25 23:06:43 -08:00
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3418383917 Immediately break on bad mem access in jit slowmem. 2013-01-25 22:52:51 -08:00
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db5fa233a8 Make sure we don't mark a reg dirty on noop. 2013-01-25 22:34:01 -08:00
Henrik Rydgard
2738417040 VFPU JIT: start setting up infrastructure. very incomplete. vdot works if undisabled, but isn't complete. 2013-01-26 01:34:19 +01:00
Henrik Rydgard
68991511ee Split out the FPU reg cache into its own file too. 2013-01-26 01:34:19 +01:00
Henrik Rydgard
ad5e2b58c6 Separate the two regcaches before doing major surgery to FPURegCache. 2013-01-26 01:34:18 +01:00
Henrik Rydgard
dd149a50a3 Must flush FPR regcache before thrashing the fp regs 2013-01-25 19:55:30 +01:00
Henrik Rydgard
aabc0aa9ef Quick implementation of LV.Q and SV.Q in x86/x64 JIT 2013-01-25 19:50:30 +01:00
Henrik Rydgård
0f080aeaaa Merge pull request #492 from unknownbrackets/jit-minor 
ALU jit optimizations
 2013-01-25 01:01:34 -08:00
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a7c6f46829 Optimize and/or 0 to just a mov in x86 jit. 2013-01-25 00:25:40 -08:00
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ab9bea068c Jit reg+reg compile time, and avoid flushing EDX. 2013-01-25 00:16:55 -08:00
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ce5f393fb8 Hit immediates in the ALU better and more simply. 2013-01-25 00:16:55 -08:00
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d1909a1581 Add a quick disable define for nice delay slots. 2013-01-24 19:11:03 -08:00
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75cbe18afc Simplify nice delay slot detect, and yes for noop. 
NOOP seems very common so this should already benefit speed a bit.
 2013-01-24 08:29:32 -08:00
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2eba209f64 Move around the jit nice delay slot logic. 
Nice delay slots don't not save flags, they run before the CMP.
 2013-01-24 07:31:51 -08:00
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3444fc8981 Avoid some memory writes on jr. 
Should improve tight mips function loops a bit.
 2013-01-24 01:23:50 -08:00
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c1757ee166 Check downcount in jit after a syscall. 2013-01-23 22:25:35 -08:00
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0e33923844 Belt and suspenders check for branch ops. 2013-01-22 08:11:37 -08:00
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c324983340 Make the jit support bltzal and friends. 
Fixes problems with jit in games.  Android changes completely untested.
 2013-01-22 08:04:01 -08:00
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a9d0390426 Adjust downcount before syscalls, not after. 
This makes jit slightly slower for syscalls, but it's minor and makes
sure jit and interpreter timing are determistically the same.
 2013-01-21 22:57:53 -08:00
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566b7a0910 A branch was missing inDelaySlot, refactor it. 2013-01-21 22:45:07 -08:00
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c897e6446a Don't over decr downcount when hitting a jit bp. 2013-01-21 19:41:12 -08:00
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8438371941 Read memory in the jit dispatcher same as lw. 
Just for consistency.  One less op, maybe faster, probably same.
 2013-01-21 17:51:14 -08:00
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1485b0865c Improve the speed of branch debugging a bit. 2013-01-20 19:48:55 -08:00
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dd69694302 Add some optional logging to debug jit branching. 2013-01-20 19:48:55 -08:00
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776eb8ab2e Simplify CompileDelaySlot(). 2013-01-20 19:48:54 -08:00
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df06bb5624 Add some checks to make sure ZERO is never set. 2013-01-20 19:48:53 -08:00
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a43078ab68 Same optimization for FPU load / store. 2013-01-20 13:16:41 -08:00
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f5963df0dc Optimize write to a single x64 op too. 2013-01-20 13:06:19 -08:00
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e8dc99328a Avoid using EAX as a temporary where possible. 
All the regs should be indirect addressing compatible.  So if it's
in a reg, let's use that instead of EAX.
 2013-01-20 12:57:14 -08:00
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eaa24ee047 Use EDX as a temporary for sb, and jit it. 2013-01-20 12:25:08 -08:00
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30f6a4ba87 Fix stupid stupid typo breaking slowmem jit. 2013-01-20 09:39:13 -08:00
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da22eb8adf Make swc1 and lwc1 fast even without fastmem. 2013-01-20 02:07:00 -08:00
Henrik Rydgård
2cb830510c Merge pull request #444 from unknownbrackets/jit-minor 
Don't muck with currentMIPS->r directly in the slowmem jit
 2013-01-20 01:58:48 -08:00
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53600161ba Don't write anything to a bad static pointer. 
Not sure what came over me...
 2013-01-20 00:19:18 -08:00
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385417effe Log jit misses at runtime instead of compile time. 
Really, it could be very different after all... this shouldn't be
all that slow, I guess.
 2013-01-19 20:11:17 -08:00
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75a3872923 Log missed jit ops for poor man profiling. 2013-01-19 19:58:25 -08:00
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e78223d2c0 Since flipping the op is easy, also do lb/lh. 2013-01-19 16:25:57 -08:00
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5e8f1917ee Fix 64-bit memory dereferencing. 2013-01-19 16:25:57 -08:00
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90e6f0b7df Optimize static memory read/writes in jit as well. 
Like the arm jit does.
 2013-01-19 16:25:56 -08:00
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c64966c16e Oops, lost the CONDITIONAL_DISABLE. 2013-01-19 16:25:56 -08:00
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37fb64ac83 Fast path scratchpad too, shouldn't be expensive. 2013-01-19 11:11:45 -08:00
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72e547420d Refactor jit slowmem, add lbu to jit since easy. 2013-01-19 11:11:45 -08:00
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5305017fc3 Properly save registers before the slowmem call. 2013-01-19 11:11:44 -08:00
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f1295f6262 Don't muck with currentMIPS->r in the slowmem jit. 2013-01-19 11:11:44 -08:00
Henrik Rydgard
229d4e9f32 Buildfix 2013-01-19 13:10:52 +01:00
Henrik Rydgård
c20cef2399 Merge pull request #440 from unknownbrackets/jit-minor 
Micro optimizations to x86 jit mem when fastmem is off
 2013-01-19 02:04:34 -08:00
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2ad77aa9c8 Gotta flush before the call, too. 2013-01-19 01:53:11 -08:00
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09422d5adb Avoid a func if possible when fastmem is off. 2013-01-19 01:02:47 -08:00
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bc75b68c36 Also jit sh and lhu, which are pretty common ops. 2013-01-18 23:10:51 -08:00
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d5ae85201c Optimize sw/lw even under safe memory. 
They're very common instructions, so shaving cycles helps.
 2013-01-18 23:10:50 -08:00
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11c5cdfdb0 Refactor out all the CheckJitBreakpoint()s. 
Ah, much cleaner.
 2013-01-18 21:33:23 -08:00
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5080285e54 Add breakpoints for delay slots. 
Wanted to do this in CompileAt(), darn not nice delay slots.
 2013-01-18 21:12:58 -08:00
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40ae3dfe45 Correctly break at branch points in x86 jit. 2013-01-18 21:12:53 -08:00
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beac991a9e Clear jit cache when changing breakpoints. 
For now, only when paused.  I don't think clearing the cache while
running is an awesome idea.
 2013-01-18 20:12:53 -08:00
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a9293c8923 Add breakpoints to x86 jit for easier debugging. 
They should be really fast so leaving them on in release.
 2013-01-18 20:10:37 -08:00
Henrik Rydgard
674911ddba Move downcount into MIPSState for efficiency, enable block linking. 
On ARM JIT we can now reach it through the cpu context reg.
 2013-01-12 00:44:18 +01:00
Henrik Rydgard
ea3055322c Oops 2013-01-09 00:45:54 +01:00
Henrik Rydgard
f5c94775b9 Cleanup 2013-01-09 00:12:02 +01:00
Henrik Rydgard
76481a300c Icache must be invalidated. Jit now starts to run, but there's no cube in cube.elf! 2013-01-08 23:52:11 +01:00
Henrik Rydgard
8915677241 More progress but it weirds out... 2013-01-08 21:24:42 +01:00
Henrik Rydgard
e3a4ed510c Fix bug in x86 jit :) 2013-01-08 19:30:28 +01:00
Henrik Rydgard
8c06edc47b It's getting close to the first totally unoptimized jit run. 2013-01-08 17:03:17 +01:00
Henrik Rydgard
b3fd1ff34c Lots of various work on the ARM jit. It executes a couple of blocks now. 2013-01-08 13:49:52 +01:00