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15,234 Commits 19 Branches 54 Tags 247 MiB
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559 Commits

Author SHA1 Message Date
Henrik Rydgård
980de339ce Fix buildfix: there shouldn't be a zero there at all. 2013-12-09 16:53:46 +01:00
Henrik Rydgård
e76fc5e56c Clang 3.4 buildfix 2013-12-09 12:52:03 +01:00
Unknown W. Brackets
5d2ff64252 Support for modified jit-enabled VerySleepy. 
This allows profiling the jit.  Should have zero perf impact when not
in use, since it's entirely triggered by VerySleepy.
 2013-11-30 19:20:21 -08:00
Unknown W. Brackets
dffa35ef2f When ins is used with a zero argument, don't OR. 
Seems it's used effectively to mask out bits with rs=zero.  Makes sense...
 2013-11-29 09:17:12 -08:00
Henrik Rydgard
f9f6e9492d Reorder vfpu data in saved kernel contexts when loading in a new version. 2013-11-28 13:27:51 +01:00
Henrik Rydgard
55500d4bb6 Reorder VFPU registers in memory so that we can flush and reload them in bulk more often. 
Doesn't actually do that yet, that's for the NEON branch.
 2013-11-28 13:27:51 +01:00
Sacha
95881bdaac Blackberry: Add simulator support. 2013-11-26 12:18:34 +10:00
Henrik Rydgard
ab3037112f Some scaffolding for a future VFPU-on-NEON implementation 2013-11-19 21:41:48 +01:00
Henrik Rydgard
99af10cb09 Get rid of bool disablePrefixes in ARM build (already gone in x86) 2013-11-19 21:41:48 +01:00
Henrik Rydgard
5bb3824dcf Implement vocp on ARM and x86. 2013-11-19 21:41:47 +01:00
Unknown W. Brackets
763eff181d Fix handling of jalr when delay slot changes rd. 2013-11-14 23:39:13 -08:00
Henrik Rydgard
a2e0a4d9bf x86 jit: Optimize ES, NS (is-nan-or-inf) conditions in vcmp 2013-11-12 14:07:48 +01:00
Henrik Rydgard
84f20a1cad Small optimizations 2013-11-12 14:05:50 +01:00
Unknown W. Brackets
a334aaf6ca x86jit: Refactor and skip flushes in branch cont. 
Still not faster, but at least the code isn't as messy.
 2013-11-12 00:45:28 -08:00
Unknown W. Brackets
7e19933f64 x86jit: Try predicting branch continues. 
Still doesn't seem to work.  Something like a 4% gain in Star Ocean was
the best I saw...
 2013-11-10 22:50:23 -08:00
Unknown W. Brackets
bb960480c8 x86/armjit: Stop compiling on a jump to invalid. 2013-11-10 21:59:50 -08:00
Unknown W. Brackets
fd38b10ab6 x86jit: Rename imm funcs to match armjit. 2013-11-10 21:59:49 -08:00
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359110f010 x86/armjit: Add jump following (off by default.) 
Inlines function calls up to a certain extent.  Allows us to get
immediates all the way to a syscall, for example, usually.

Not sure if faster.
 2013-11-10 21:59:49 -08:00
Unknown W. Brackets
aacb31bc18 armjit: Copy over (disabled) immbranch optim. 
This does a little loop unrolling.  Costs a bit more cache space, but
avoids flushing regs for longer.

Not enabled.
 2013-11-10 21:59:48 -08:00
Unknown W. Brackets
455a7e090d Compile the cache instruction to nothing. 
Was showing up in a few profiles, does nothing currently.
 2013-11-10 14:38:10 -08:00
Unknown W. Brackets
1cc68f50ca armjit: Small optimization to syscall instr. 2013-11-10 14:38:10 -08:00
Unknown W. Brackets
b30928036e armjit: Avoid flushing an imm in beq/bne/etc. 
We might be able to STMIA it instead.
 2013-11-10 14:38:10 -08:00
Unknown W. Brackets
3a8f0598c4 x86jit: Implement wsbh/wsbw. 2013-11-10 14:38:09 -08:00
Henrik Rydgard
0a844ce98d Delete functions for vsge and vslt, these have been rolled into VecDo3 2013-11-09 19:29:52 +01:00
Henrik Rydgard
06ce01ea04 Remove erroneous comment. 2013-11-09 17:34:52 +01:00
Henrik Rydgard
5ad04a23f4 x86 jit: Rename BindToRegister to MapReg 2013-11-09 15:23:31 +01:00
Henrik Rydgard
316d23d4cc Optimize mfv/mtv/mfc1/mtc1 on x86 too 2013-11-09 14:06:45 +01:00
Unknown W. Brackets
02dd250354 armjit: Optimize out a few immediate logic cases. 2013-11-08 11:39:24 -08:00
Henrik Rydgard
58db79672f Fix vmtvc on ARM, fixing issues with our prefix check. Add some logging. 
Also improve vcmp on ARM.
 2013-11-08 19:59:11 +01:00
Henrik Rydgard
309f904c0c Extract JitState into its own header (arm/x86) 2013-11-08 18:51:52 +01:00
Henrik Rydgard
5a95e267fb Add an optimization to discard registers at the end of functions when possible. 
Works in some games but crashes many so hiding it for now. Do not add UI.
 2013-11-08 12:43:48 +01:00
Henrik Rydgard
c0d7c5e958 vsgn x86 bugfix 2013-11-07 21:07:07 +01:00
Henrik Rydgard
6eb7f94065 Implement vsgn in x86/x64 and ARM jit 2013-11-07 15:29:13 +01:00
Unknown W. Brackets
732ae13ebb Fast path CallSyscall where possible. 
It seems we're spending a decent amount of time there, which isn't
entirely unexpected.  We can eliminate some things easily.
 2013-11-04 07:59:37 -08:00
Unknown W. Brackets
5efc7fd581 Fix typo. 2013-11-03 07:36:53 -08:00
Henrik Rydgard
c4e02ab41d Revert "Fix Comp_VRot on x86 Linux/Mac/etc." 
Seems broken, doesn't built on Windows.

This reverts commit d41acebb3d.
 2013-11-03 15:24:57 +01:00
Unknown W. Brackets
d41acebb3d Fix Comp_VRot on x86 Linux/Mac/etc. 
Easy way: just use our existing functions that work.
 2013-11-03 01:03:57 -07:00
Henrik Rydgård
07a868910e Add a temporary hack option that may help debugging the wipeout glow. 
It reduces the glow problem by a lot but is obviously incorrect.
 2013-10-30 22:47:36 +01:00
Unknown W. Brackets
da20bda729 Make memchecks ignore cached/uncached memory. 
You usually want both.
 2013-10-27 13:15:12 -07:00
Unknown W. Brackets
95c68ae1e7 Assert some unlikely buffer overflows. 2013-10-26 18:30:55 -07:00
Unknown W. Brackets
e8091dce44 Speed up FPURegCache::Start() on x86. 
This cuts that func by 97% when running the automated tests, and it was 8%
of the total time.  Won't really affect games.
 2013-10-24 08:27:42 -07:00
Henrik Rydgård
598e06faa8 Make Home in the game browser available on linux/mac/etc too. 
Misc tweaks.
 2013-10-21 12:21:22 +02:00
Unknown W. Brackets
1283a93492 Avoid some minor warnings. 2013-10-19 14:57:45 -07:00
Unknown W. Brackets
2e8ef3027f Write the retaddr to rd, not always ra, in jalr. 
Thanks go entirely to @Kingcom for pointing this out.

Don't know of any games not using RA as the rd.
 2013-10-17 07:39:33 -07:00
Henrik Rydgard
aa3cf34fc1 Jit: Fix valgrind warnings. 
The first time PrefixStart was entered with startDefaultPrefix = true, it would
call EatPrefix, which checks the so far entirely uninitialized prefixXFlags.
 2013-10-16 22:33:48 +02:00
Unknown W. Brackets
d43c56ea29 Small warning fix. 2013-10-13 12:12:53 -07:00
Henrik Rydgard
e08ac100ce Update native with workaround for #4078 and add some comments 2013-10-08 20:11:01 +02:00
Henrik Rydgard
fc8aa7bd8f Crashfix dumping display lists that start at the start of VRAM (seems to hit this in GTA). 
Add a couple of comments.
 2013-10-07 22:58:46 +02:00
Henrik Rydgard
8f620c30ab x86 jit: Implement vs2i (similar to vh2f but simpler) 2013-10-07 21:59:33 +02:00
Henrik Rydgard
b661ae6c41 Add very simple jit viewer screen to dev menu. Add untested emitter for cvt.f32.f16 & c:o. 2013-09-29 13:41:56 +02:00
Henrik Rydgard
7bb93c3bfe Forgot to re-enable the "single" case of vh2f 2013-09-29 01:43:13 +02:00
Henrik Rydgard
649e830028 Minor cleanup 2013-09-28 22:19:00 +02:00
Henrik Rydgard
20174d9410 Delete the lookup table version of vh2f 2013-09-28 22:15:29 +02:00
Henrik Rydgard
7ca6d73857 Two approaches to vh2f (half-float to float): lookuptable and fast SSE 2013-09-28 22:08:44 +02:00
Henrik Rydgard
cfdfa77476 Change a bunch of "MayHavePrefix" to "HasUnknonwPrefix". 
Should be safe, I think none of these have any sane use of prefixes anyway.
 2013-09-28 12:33:16 +02:00
Henrik Rydgard
aa753c88b2 ARM: implement vhdp 2013-09-28 12:30:28 +02:00
Unknown W. Brackets
2751da1cec Cut down on work in regcache init on x86. 
Very tiny tiny optimization for games, but 8-10% optimization for tests.
 2013-09-19 00:29:50 -07:00
Henrik Rydgard
1bb6bbd07d Remove superfluous check in vrot 2013-09-16 00:24:28 +02:00
Henrik Rydgard
6aecfe3998 Trying the VROT disable experiment again, this time in the right file... 2013-09-16 00:14:05 +02:00
Unknown W. Brackets
16b27ffb23 Disable x86 Comp_VRot on non-Windows. 
This may fix x86 Android issues as well as Linux/etc.
 2013-09-15 11:42:58 -07:00
Unknown W. Brackets
50e9e45d65 Check version in each DoState() func. 
They bail on PointerWrap error or bad version.
 2013-09-14 20:23:03 -07:00
Unknown W. Brackets
cbf1df9b01 Check for nan/inf in trunc.w.s in x86 jit. 
Now x86 jit passes the fpu test too.
 2013-09-13 22:32:25 -07:00
Henrik Rydgård
2b2678beba Merge pull request #3686 from unknownbrackets/warnings 
Warning fixes
 2013-09-08 00:33:46 -07:00
Unknown W. Brackets
157b682344 Always use fastmem for sw/lw on SP. 2013-09-07 22:44:18 -07:00
Unknown W. Brackets
c3839a53e5 Fix some minor warnings. 2013-09-07 22:40:08 -07:00
Henrik Rydgard
8c88dff5a4 More log categories, use them (and existing ones). Improve log config. 2013-09-07 22:02:55 +02:00
Henrik Rydgard
324cde5a79 Let's actually use the log category mechanism. A first step. 2013-09-07 21:19:21 +02:00
Henrik Rydgard
78d3ee3d6a Misc cleanup, mostly logging code 2013-09-07 13:01:19 +02:00
Unknown W. Brackets
dc05051696 Add more reporting for cpu instructions. 2013-09-05 23:27:51 -07:00
Unknown W. Brackets
538a4c064c Add a note so as not to forget. 2013-09-01 01:15:08 -07:00
Unknown W. Brackets
b558189c37 Just invalidate blocks on ClearCacheAt(). 
This makes it safe to call from a jitted syscall, etc.
 2013-09-01 00:32:43 -07:00
The Dax
a35a407207 Add two new instructions to the MIPS interpreter for logging. vertex.pbp demo seems to use one of them. 2013-08-25 16:28:19 -04:00
Unknown W. Brackets
97aa1a631e Improve typesafety in the x86 regalloc. 2013-08-24 19:41:10 -07:00
Unknown W. Brackets
3156b95d3f Make sure there's enough space while compiling. 2013-08-24 17:38:22 -07:00
Unknown W. Brackets
6c97b66806 Cap imm branch instructions, reset compiling. 
Break and other delay slot ops could've set it to false.

It's actually sometimes faster now.
 2013-08-24 17:26:24 -07:00
Unknown W. Brackets
52d6080fb4 Pass in some analysis results, don't use yet. 2013-08-24 15:36:24 -07:00
Unknown W. Brackets
109ad17ac6 Use a typesafe struct for opcodes. 
Also, correctly read delayslots using Read_Instruction on ARM.
 2013-08-24 15:36:24 -07:00
Unknown W. Brackets
b37f09cedf Make MIPSInfo a struct for typesafety. 
Found a bug in ReadsFromReg().
 2013-08-24 13:22:10 -07:00
Unknown W. Brackets
9864c1cd8d Minor x86 jit branch tweak from arm. 2013-08-16 23:48:41 -07:00
Unknown W. Brackets
8327cd0f8e Clean up some inconsistency in jit branches on arm. 2013-08-16 02:02:56 -07:00
Unknown W. Brackets
df32c99be6 Attempt to follow branches to a max # of ops. 
Seems to make it slower also.  Maybe taking the branch would be better...
hmmph.
 2013-08-16 01:07:11 -07:00
Unknown W. Brackets
defd2b6383 Attempt at doing branches with imm args. 2013-08-16 01:05:52 -07:00
Unknown W. Brackets
6b0b5145e5 Clean up some inconsistency in jit branches. 2013-08-16 00:44:23 -07:00
Unknown W. Brackets
14b719a7ac Make it possible to have more block exits. 2013-08-16 00:12:49 -07:00
Unknown W. Brackets
64c2ea86c0 Add a method to save the gpr/fpr state in jit. 2013-08-16 00:12:49 -07:00
Unknown W. Brackets
2758634a0f Avoid overhead calling __KernelIdle(). 
~1.8% improvement in Zettai Hero Project.
 2013-08-15 01:35:17 -07:00
Unknown W. Brackets
df50e03146 Add a safety log for cases we don't handle right. 2013-08-14 23:14:25 -07:00
Unknown W. Brackets
e639f8d15f Handle branches in VFPU delay slots better. 
Based on tests on a PSP, all branches are attempted.  The behavior is
technically undefined.

It seems to take the delay slot's target if they differ and both pass.
This is the behavior the interpreter has, but it's more work in jit.

Since only a couple games seem to do this, and clearly expect this
behavior, this fixes all known cases of #1926.
 2013-08-14 22:56:02 -07:00
Unknown W. Brackets
8266063394 Make sure we're reporting unknown instructions. 2013-08-11 18:20:43 -07:00
Henrik Rydgard
fecd9d5f78 Minor optimization, sketch on an lvl.q jit implementation 2013-08-11 22:12:15 +02:00
Henrik Rydgard
89ddbb51bb Oops, XMM0 might be taken by temps. Also, s/GC_ALIGN16/MEMORY_ALIGN16 2013-08-10 23:39:24 +02:00
Henrik Rydgard
4c6006190f Of course, found the real bug causing #3117 immediately after the revert. Fixed. 2013-08-10 23:32:12 +02:00
Henrik Rydgard
0dac2b4783 Update native, minor UI stuff and cleanups 2013-08-10 23:04:23 +02:00
Henrik Rydgard
394f590c36 Failed attempt at implementing vsge/vslt. Dunno what's wrong but disabled for now. 2013-08-10 18:39:27 +02:00
Henrik Rydgard
174223c42b Fix VCMP (VC_TR) and optimize a little 2013-08-08 21:03:40 +02:00
Henrik Rydgard
8714240519 Fix vf2i properly on x86. 2013-08-07 21:30:57 +02:00
Henrik Rydgard
dce3c9449b Attempt to quickfix vf2i but failed, so disabling it. Should fix #3084 2013-08-07 18:07:49 +02:00
Henrik Rydgard
201282f28c JIT: Implement vf2i (truncate mode only) 2013-08-06 19:08:15 +02:00
Henrik Rydgard
c71b304ba1 Fix a classic bug again (now in armjit), + a minor opt 2013-08-06 15:22:19 +02:00
Henrik Rydgard
1d81698728 JIT (both): Implement VCMOV 2013-08-06 13:29:17 +02:00
Henrik Rydgard
d2c9919573 Vcmp: Fix ARM, optimize x86 slightly 2013-08-06 11:49:10 +02:00
Henrik Rydgard
2f0cdc6988 ARMJIT: disable vi2f, it seems buggy. preliminary disabled impl of vcrsp.t. 2013-08-06 11:10:26 +02:00
Henrik Rydgard
4e8958f42d A small optimization, a few jit stubs, and cross/quat product on x86. 2013-08-01 00:15:08 +02:00
Henrik Rydgard
76ae643335 Cleanup 2013-07-31 22:42:51 +02:00
Henrik Rydgard
c86dc7279e JIT: Implement VCMP in both JITs. Only the x86 one is tested and enabled. 2013-07-31 22:29:16 +02:00
Henrik Rydgard
7fc5ce56de Fix viim for x86, implement for ARM. 2013-07-31 18:21:23 +02:00
Henrik Rydgard
0a8f85a919 Some JIT cleanup, implement VI2F on ARM. also disabled untested impl of viim for x86. 2013-07-31 17:27:04 +02:00
Henrik Rydgard
51596b636a Fix numerous ARM JIT bugs. Activate vmtvc and vscl, and vadd/vmul/vdiv/vsub for real this time. 2013-07-31 10:34:58 +02:00
Henrik Rydgard
9ac511f191 Don't check vector size in vfim (nonsense). implement for arm. minor fix. 2013-07-30 22:34:12 +02:00
Henrik Rydgard
e93c2abe27 x86 jit: implement vfim. Move some stuff to native. cleanup for armjit logging 2013-07-30 22:28:05 +02:00
Henrik Rydgard
ee215cc316 ARMJIT: Fix eatprefix, add DirtyInInV mapping, misc stuff 2013-07-30 18:15:48 +02:00
Henrik Rydgard
d8294f025f More VFPU stuff (nothing new activated) 2013-07-30 01:09:11 +02:00
Henrik Rydgard
3b9e6243eb Only flush the required registers on function calls (only implemented for real on ARM) 2013-07-28 22:21:43 +02:00
Henrik Rydgard
3341e7e7fc Fix VROT on 32-bit x86 2013-07-28 22:20:32 +02:00
Henrik Rydgard
6ecd0194fa Implement VROT in both JITs, as it's heavily used by a few games. 
Another ~1-3% in FF:CC.
 2013-07-28 18:22:12 +02:00
Henrik Rydgard
daaed2183f Jit x86: Implement vhdp 2013-07-28 18:22:11 +02:00
Henrik Rydgard
8feeaf2e7a Jit: Implement vidt in both, plus translate a couple easy ones to ARM. 2013-07-28 16:14:21 +02:00
Henrik Rydgard
59644ad59b Jit: Implement VMMUL for ARM, optimize the x86 implementation. Also add VCST. 2013-07-28 12:14:35 +02:00
Unknown W. Brackets
b307d77b61 Oops, need to still rewind on breakpoint. 2013-07-27 15:05:16 -07:00
Unknown W. Brackets
1a9b190188 Treat CORE_NEXTFRAME like CORE_RUNNING is bps. 
Fixes some cases where breakpoints skip instructions incorrectly.
 2013-07-27 13:26:43 -07:00
Henrik Rydgard
afcb5add51 Minor code cleanup/reindent around ARM jit 2013-07-27 22:14:01 +02:00
Unknown W. Brackets
286c153c6a Fix memchecks for halfwords and bytes. 
Before it was doing the range on a 4 byte read, which would trip a
memcheck that wasn't actually being hit if the byte of halfword was
unaligned.
 2013-07-06 13:15:48 -07:00
Unknown W. Brackets
25cc09b81b Improve perf when ignore illegal is off. 
Most users will have it on, but this improves perf a bit when it isn't.
 2013-07-06 13:04:19 -07:00
Unknown W. Brackets
77670876cd Fix memcheck range intersect check. 2013-07-06 12:08:34 -07:00
Unknown W. Brackets
2b4344f61d Don't rewind the PC on memcheck w/ CORE_NEXTFRAME. 
If the memcheck doesn't hit, we'll still rewind the PC, causing weirdness.
This is likely if you try to memcheck an address hit first thing in a
vblank interrupt handler or something.
 2013-07-06 03:30:21 -07:00
Unknown W. Brackets
2d15eb2acd Re-enable lwl/lwr/swl/swr on the x86 jit. 
Now correctly handling ECX on x64.
 2013-07-06 01:21:52 -07:00
Unknown W. Brackets
662ae77214 Save regs before/after 3-arg func calls on x86. 
This fixes bugs only on x64 when ABI_CallFunctionACC and etc. were used.
This was breaking things since R8 was not being saved (arg 3.)
 2013-07-06 00:54:53 -07:00
Unknown W. Brackets
19f2b35679 Keep the stack aligned when tripping memchecks. 2013-07-06 00:22:09 -07:00
Unknown W. Brackets
1c9086617a DISABLE the swr/swl and friends for now. 
Broke Disgaea on x64 only, not sure why right now.
 2013-07-05 02:53:15 -07:00
Henrik Rydgård
abc03520b4 Merge pull request #2625 from unknownbrackets/debugger 
Fix some memcheck bugs
 2013-07-05 02:26:13 -07:00
Unknown W. Brackets
5271f36d78 Output less code per memcheck. 
Somehow this also fixed a bug with memchecks that didn't hit, but I don't
know why.  Reverting and making them far jumps doesn't help.... strange.

Anyway, this should be less code which is good.
 2013-07-05 01:33:39 -07:00
Unknown W. Brackets
c64f6c3f39 Don't just forget other memchecks, arg. 2013-07-05 01:26:02 -07:00
Unknown W. Brackets
540bd13222 Correctly match ranges in memchecks with ends. 2013-07-05 01:16:57 -07:00
Unknown W. Brackets
3278b5e373 Handle the immediate case of clz/clo. 2013-07-04 23:07:42 -07:00
Unknown W. Brackets
d823989330 Implement vmone/vmzero/vmidt for the x86 jit. 2013-07-04 18:16:57 -07:00
Unknown W. Brackets
654490566f Implement clz/clo in x86 jit. 2013-07-04 18:01:17 -07:00
Unknown W. Brackets
e27ab6fa11 Add swl/swr to the x86 jit. 2013-07-04 17:34:56 -07:00
Unknown W. Brackets
203daf955b Implement lwl/lwr in the x86 jit. 2013-07-04 17:30:36 -07:00
Unknown W. Brackets
2d25d1eb05 Add a way to force alignment in JitSafeMem(). 2013-07-04 15:59:12 -07:00
Unknown W. Brackets
942d50d521 When hitting go on a memcheck, also skip it. 
If you hit go you most likely want it to continue past the instruction you
were on.
 2013-06-30 16:35:48 -07:00
Unknown W. Brackets
8ee88ae5a2 Don't skip memcheck'd op when illegal reads is off. 2013-06-30 16:35:48 -07:00
Unknown W. Brackets
9209a30d9b Add skeleton for conditional breakpoints. 2013-06-30 16:35:47 -07:00
Unknown W. Brackets
6bd4383a8a Give memchecks/breakpoints a consistent interface. 
Removes the limit on max breakpoints, and makes everything use accessors
for both that look roughly the same.
 2013-06-30 15:16:58 -07:00
Unknown W. Brackets
c9c3bc83e4 Log more info about branches in delay slots. 2013-06-30 13:19:27 -07:00
Unknown W. Brackets
84f65dc961 Save flags around conditional breakpoint check. 2013-06-29 11:45:29 -07:00
Unknown W. Brackets
609f8d6340 Allow hitting Go on a breakpoint to continue. 
Doesn't work for branches though, because of delay slots.
 2013-06-29 11:23:24 -07:00
Unknown W. Brackets
aaafd372e9 Clear temp breakpoints off the CPU thread. 
This should make it possible to actually clear them.  Fixes #2519.
 2013-06-29 10:54:33 -07:00
Henrik Rydgard
ce2c18d2fe Remove redundant vmov instructions (seen in wipeout) 2013-06-15 00:19:48 +02:00
Sacha
a26b48fc0b Stub wsbh/wsbw for x86. 2013-06-05 14:55:01 +10:00
Unknown W. Brackets
2cd8f928a7 Just disable the this constructor warning here. 2013-05-31 23:14:27 -07:00
Unknown W. Brackets
5595146f56 Add reporting for jumps in delay slots. 2013-05-26 20:30:14 -07:00
Henrik Rydgard
f20e00315d Add basic support for the second analog stick present in the PS3 PSP emu for HD remakes. 
Make vi2f safer.
 2013-04-28 22:15:33 +02:00
Henrik Rydgard
b603214777 Also implement vcst in x86 jit 2013-04-27 22:00:09 +02:00
Henrik Rydgard
bac7e87125 Add support for vi2f to x86 JIT 2013-04-27 21:46:00 +02:00
Henrik Rydgard
1a1c161a0d Implement vmin/vmax in x86 jit, slots right into VecDo3 2013-04-27 20:52:42 +02:00
Henrik Rydgard
6f4ad05582 Remove some unused code, add some stubs to vfpu jit, some cleanup 2013-04-27 19:35:42 +02:00
Henrik Rydgard
2a39a3b972 JIT: Get rid of one memory access per dispatch, and get rid of blockcodepointers. 2013-04-27 01:32:03 +02:00
Henrik Rydgard
9eace8a80e Combine the two JitCache implementations (x86, ARM) into one. 2013-04-27 01:32:03 +02:00
Henrik Rydgard
8a904fe478 Some JIT cleanup 2013-04-27 01:32:02 +02:00
Unknown W. Brackets
3bb5651ca7 Initial x86 jit for vtfm/vhtfm. 2013-04-20 01:52:06 -07:00
Unknown W. Brackets
9245490b53 Initial / simple vmscl for x86 jit. 2013-04-20 01:34:16 -07:00
Unknown W. Brackets
29109d25af Non-optimal vmmul for x86 jit. 
It's faster than interpreter anyway, but it could be much better.
 2013-04-20 01:15:15 -07:00
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cfac7324d6 Implement vscl in the x86 jit. 2013-04-20 01:15:14 -07:00
Henrik Rydgard
e3fb88de68 Background thread for icon loading, show in game list. Switch to GNU STL in Android port. 2013-04-13 21:24:07 +02:00
Henrik Rydgard
81444c92a1 win32-gl-ui: Cleanup 2013-03-29 21:21:27 +01:00
Henrik Rydgard
724a600381 Buildfix android, misc other fixes, some include cleanup 2013-03-29 20:55:32 +01:00
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e4223dbcb0 Simplify adding report messages, add a bunch more. 2013-03-26 00:54:00 -07:00
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ed76563973 Don't bother checking nice, just do it after. 2013-03-11 02:18:27 -07:00
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b5fe67eb3d If the out is RA, delay slot isn't nice for jal. 
Fixes Phantasy Star Portable 2 in jit.
 2013-03-11 02:14:38 -07:00
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9cf2bcd06c Fix register memcheck to respect offset. 2013-03-09 09:01:23 -08:00
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d051ea3106 Flush when checking for memcheck coreStates. 
Trouble is this has to be done outside the lock.  So, moved out.
 2013-03-09 02:41:50 -08:00
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a926ef6776 Respect read/write only mem breakpoints in x86 jit. 2013-03-09 02:41:49 -08:00
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15ff927d4d And now the dynamic memory breakpoints in x86 jit. 
And add notes that this is interpreter/HLE only for now.
 2013-03-09 02:41:49 -08:00
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68aaac25c6 Use unsigned compares in slowmem x86 jit. 2013-03-09 02:41:48 -08:00
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d10bdd6938 Basic working imm mem breakpoints in x86 jit. 
Seems to work okay.  Doen't cover HLE of course.
 2013-03-09 02:41:48 -08:00
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6290b67984 Validate the full memory access is valid. 
Probably barely matters, but since we have the size now anyway...
 2013-03-09 02:41:47 -08:00
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4908fb8046 Don't trip in a delay slot for bad mem access. 
Could've done some tricky things... we don't jump correctly then.
 2013-03-09 02:41:47 -08:00
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2d6a730cac Add some basics for memory checks to x86 jit. 
Specifically, we will need to be able to bail in delayslots,
and we will need to know the size of the access (useful anyway.)
 2013-03-09 02:41:46 -08:00
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c4ab0855b4 Make sure interpreter and jit savestates match. 2013-03-08 08:49:21 -08:00
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028e85dc92 Cleanup some differences between the two jits. 2013-03-07 02:08:44 -08:00
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669600bd8a Minor cleanup. 2013-03-07 02:08:44 -08:00
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ac1209204c Add some reporting for CPU related stuff. 2013-03-04 00:01:41 -08:00
Henrik Rydgard
1e3a00ee9d armjit: implement vzero, vone. Use vmla for dot product. 2013-03-03 20:56:22 +01:00
Henrik Rydgard
516ca8a0c4 Merge branch 'master' into armjit-fpu 
Conflicts:
	Core/MIPS/ARM/ArmJit.h
	Core/MIPS/x86/CompVFPU.cpp
	GPU/GLES/Framebuffer.cpp
 2013-02-28 23:56:28 +01:00
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64c42ffaf2 Fix some warnings generated by clang. 2013-02-24 10:23:31 -08:00
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3fbb5d4388 Avoid using CALL() directly in case of far calls. 
This mainly matters for x64.
 2013-02-24 00:12:55 -08:00
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7eb9af271b Fix downcount check without fastmem in jr. 2013-02-23 14:30:24 -08:00
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2164a7fdf9 Keep track of whether we're in the runloop or not. 2013-02-23 13:01:00 -08:00
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313ffdb495 Add a stub for clz/clo in x86 jit. 2013-02-21 01:25:02 -08:00
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08923c092b Implement ins and ext in the x86 jit. 2013-02-21 01:25:01 -08:00
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dede852c03 Optimize out slti in the x86 jit. 
I'm kinda surprised this actually happens...
 2013-02-21 01:25:01 -08:00
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abde404c00 Optimize out some addu/etc. calls against imms. 2013-02-21 01:25:01 -08:00
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9e479b4391 Optimize addi/addiu to just LEA when possible. 2013-02-21 01:25:00 -08:00
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2db368c29a Add more imm handling for shifts in x86 jit. 
This is actually hit, and propagates more imms through.
 2013-02-21 01:25:00 -08:00
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958d95a029 Make bitrev use less instructions in the x86 jit. 
Much less.
 2013-02-20 13:43:17 -08:00
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7b612cf28d Don't need this with the imm code path. 2013-02-20 12:16:57 -08:00
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c8f85ace41 Implement bitrev in x86 jit + some imms. 2013-02-20 12:09:02 -08:00
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c3be50acbb Implement movz/movn in the x86 jit. 2013-02-20 12:09:01 -08:00
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0d6d58fed4 Add min and max to the x86 jit portfolio. 2013-02-20 12:09:01 -08:00
Henrik Rydgard
5a09885a59 Port over much of unknown's vfpu jit work to arm. Untested. 2013-02-20 00:04:21 +01:00
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038394b081 Divide from -1.0 directly in x86 jit vnrcp. 2013-02-19 00:35:15 -08:00
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a438791e7c Initial (very inefficient) vmmov for x86 jit. 
This makes #464 work (at least LittleBigPlanet), but only in x86 jit.
 2013-02-18 23:21:18 -08:00
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b8e2177591 Jit vzero/vone, which are easy and common (x86.) 2013-02-18 22:15:47 -08:00
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a001b8b6f0 Tweak and note vsat0/vsat1 NaN handling. 2013-02-18 22:06:49 -08:00
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40b2a8dec1 Drop the sign in vsqrt, but not vrsq. 2013-02-18 21:46:33 -08:00
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2e6f0006fd Oops, correct the bounds check. 2013-02-18 20:43:43 -08:00
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a3eba1e96e Fix typo, should definitely be VX(). 2013-02-18 20:43:43 -08:00
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2dfdf3ffeb Implement Comp_VV2Op vfpu ops in the x86 jit. 
Also, some cleanup.  No need for this extra boilerplate, simplify...

This makes the Bink video issue slightly better, in jit only.
 2013-02-18 20:43:28 -08:00
Henrik Rydgard
e32721c72a Merge branch 'master' into armjit-fpu 
Conflicts:
	Core/MIPS/MIPSVFPUUtils.cpp
	Core/MIPS/x86/CompVFPU.cpp
	GPU/GLES/VertexDecoder.cpp
 2013-02-19 00:50:33 +01:00
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dacbcbdf2b Add a MIPSTables flag for ignoring the prefix. 2013-02-18 01:23:15 -08:00
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afb7c0b83c Assume prefixes start default until proven wrong. 
Currently this means nothing since the MIPSTables flags are wrong.
It will blow the cache once, after the first vfpu op.
 2013-02-18 01:14:57 -08:00
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0bfc380575 Try to reuse temp regs for better caching. 2013-02-18 00:32:42 -08:00
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6855398add Support known prefixes in the vfpu jit. 2013-02-18 00:11:58 -08:00
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8ea59990ab Make applying prefixes mostly automatic. 
And implement (hopefully) D prefixes.
 2013-02-18 00:11:57 -08:00
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18c03d0816 Handle temp regs better, no need for direct access. 2013-02-18 00:11:57 -08:00
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27942606ad Use prefixD directly in jit, just like interp now. 2013-02-17 22:46:34 -08:00
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08a42a1aaf Preserve orig regs when applying vfpu prefixes. 2013-02-17 22:37:56 -08:00
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d63548799b Add more temp regs, allow swapping if necessary. 2013-02-17 22:18:46 -08:00
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7fee4dfd13 Re-enable vdot and vadd/etc. in x86 jit. 2013-02-17 17:53:53 -08:00
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f532951331 Automatically eat prefixes in x86 jit. 
Simplifies the code and makes it easier to know they're eaten
even for ops not yet jitted.
 2013-02-17 17:53:53 -08:00
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6191017a2c Fix jit VDot mapping vd incorrectly to a quad. 2013-02-17 17:52:59 -08:00
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106cbcfc5d Fix possible overlap issue in VDot. 2013-02-16 21:26:32 -08:00
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0fdc975fde Fix wrong type in x86 jit fpu/vfpu load store. 2013-02-16 20:22:08 -08:00
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6eae8ed36a Disable VDot and Vec3 in x86 jit, broke things. 2013-02-16 19:57:35 -08:00
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b27701ac7d Fix VDot returning -0.0 in x86 jit. 2013-02-16 10:37:42 -08:00
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1c4c5e718b Optimize VDot and VecDo3 to avoid temporaries. 2013-02-16 10:19:05 -08:00
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0bd382c518 Discard temp regs right away, some helper funcs. 2013-02-16 10:18:13 -08:00
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0d5da967eb Enable VDot and Vec3 in x86 jit. 2013-02-16 03:27:48 -08:00
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35537b3c97 Add TEMP0 fpu regs to x86 like in armjit. 
But... will probably need more and the ability to swap into memory
if we want to deal with prefixes.
 2013-02-16 03:27:03 -08:00
Henrik Rydgard
909b768f47 Don't need separate variables for writemask. Some optimizations. 2013-02-16 09:28:55 +01:00
Henrik Rydgard
b8abb77eee More armjit-fpu work - dot product working for example. Add some non working DISABLEd stuff too. 2013-02-16 09:27:48 +01:00
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be8ddf12aa Don't go out of bounds applying vfpu swizzle. 2013-02-15 23:43:40 -08:00
Henrik Rydgard
0ee7578d68 Merge branch 'master' into armjit-fpu 2013-02-15 23:09:59 +01:00
Henrik Rydgard
d22e258943 Don't need separate variables for writemask. Some optimizations. 2013-02-15 22:56:38 +01:00
Henrik Rydgard
44e4ba8772 Merge branch 'master' into armjit-fpu 2013-02-15 21:42:44 +01:00
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e42e7bf22e Don't flush all regs in mfvc, just prefixes. 2013-02-15 09:50:07 -08:00
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f95e66eb98 Forget cached prefixes when calling generic. 
It may eat them, or maybe always does?
 2013-02-15 08:35:34 -08:00
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2b441f1638 Initial implementation of jit vadd/vsub/vdiv/vmul. 2013-02-15 08:35:34 -08:00
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b9506c9568 Minor cleanup for vdot in x86 jit. 2013-02-15 08:35:34 -08:00
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ccad259ae5 Keep track of VFPU prefixes and flush them in jit. 2013-02-15 08:35:33 -08:00
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f6f2927526 Add curlies around DISABLE/CONDITIONAL_DISABLE. 2013-02-15 08:35:33 -08:00
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4eca76e0cc Check for s/t/d prefix reg changes in jit. 2013-02-14 00:27:09 -08:00
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3b58cc27bd Oops, vfpu was missing CONDITIONAL_DISABLEs. 2013-02-14 00:27:09 -08:00
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abe390e6f3 Add some checks for fpu/vfpu writing to $0. 2013-02-14 00:27:09 -08:00
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4789a8e5eb Oops, can't have CONDITIONAL_DISABLE here, no op. 2013-02-14 00:27:08 -08:00
Henrik Rydgard
30318a4a4d Merge branch 'master' into armjit-fpu 
Conflicts:
	Core/MIPS/x86/CompFPU.cpp
 2013-02-13 20:47:41 +01:00
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f1386dfca1 Add a quick optimization to the x86 fpu comps. 2013-02-13 02:21:26 -08:00
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19cc652a37 Correct NaN handling in fpu comparisons. 2013-02-13 01:54:07 -08:00
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3cab6986c5 Jit the FPU comparisons on x86. 
Probably not too fast.  Also, NaN handling seems wrong?
 2013-02-13 00:55:10 -08:00
Henrik Rydgard
2c01b36585 Some FPU optimization 2013-02-12 00:58:31 +01:00