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4,747 Commits 14 Branches 44 Tags
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1633 Commits

Author SHA1 Message Date
billow
fc3cf3aa80 fix imask 2023-04-14 00:35:11 +08:00
billow
63db2dc804 fix mov.a mov.d 2023-04-14 00:35:10 +08:00
billow
927e075500 fix 2023-04-14 00:35:09 +08:00
billow
fec75ae36a fix RR 2023-04-14 00:35:09 +08:00
billow
85d2936f87 fix INSERT_rrpw 2023-04-14 00:35:08 +08:00
billow
3a6076a6d4 fix RRPW 2023-04-14 00:35:07 +08:00
billow
9567b8915d fix 2023-04-14 00:35:06 +08:00
billow
70058f9104 fix SRRS 2023-04-14 00:35:05 +08:00
billow
fd8a2b8dc9 fix BO BOL 2023-04-14 00:35:04 +08:00
billow
001f3487b1 fix DecodeRegisterClass 2023-04-14 00:35:03 +08:00
billow
8fa4d4cb99 fix DecodeRegisterClass 
- `DecodeABSInstruction`
- `DecodeRLCInstruction`
- `DecodeSSRInstruction`
- `DecodeSRCInstruction`
 2023-04-14 00:35:02 +08:00
billow
98f0eb61a8 fix 2023-04-14 00:35:01 +08:00
billow
e5b44ff47c add sign_ext zero_ext 2023-04-14 00:35:01 +08:00
billow
cffcfdbb4c fix 2023-04-14 00:34:58 +08:00
billow
564f962146 fix 2023-04-14 00:34:57 +08:00
billow
75c5e26358 fix DecodeInstruction 2023-04-14 00:34:54 +08:00
billow
bb16f2d785 Decode*Instruction 2023-04-14 00:34:53 +08:00
billow
b1f7cfeb84 fix build 2023-04-14 00:34:52 +08:00
billow
30432c862d add FPU Instructions 2023-04-14 00:34:52 +08:00
billow
33080bb326 update TriCore*.inc 2023-04-14 00:34:51 +08:00
billow
1a148e2b65 ST SUB SYSCALL XOR XNOR 2023-04-14 00:34:50 +08:00
billow
1e44b5346d SHA* ST* 2023-04-14 00:34:49 +08:00
billow
27e5ef647a RSUB* SAT* SEL* SH* 2023-04-14 00:34:48 +08:00
billow
093829be2b modified: arch/TriCore/TriCoreInstrInfo.td 2023-04-14 00:34:47 +08:00
billow
f7aa5d17ff MUL* NAND* NE* NOP NOR OR 2023-04-14 00:34:46 +08:00
billow
26454fd243 MSUB* 2023-04-14 00:34:45 +08:00
billow
248f7c6f14 MOV* 2023-04-14 00:34:45 +08:00
billow
86f6a60818 MAX* MFCR MIN* 2023-04-14 00:34:44 +08:00
billow
dae993af5d fix MADD* 2023-04-14 00:34:43 +08:00
billow
7f32015cfb MADD* 2023-04-14 00:34:42 +08:00
billow
3bbb2d5b76 - LD* 
- `LEA*`
- `LHA*`
- `LOOP*`
- `LT*`
 2023-04-14 00:34:41 +08:00
billow
16befd3724 ld* 2023-04-14 00:34:40 +08:00
billow
30cf8288e8 modified: arch/TriCore/TriCoreInstrInfo.td 2023-04-14 00:34:39 +08:00
billow
59da967a01 Changes to be committed: 
modified:   arch/TriCore/TriCoreInstrFormats.td
	modified:   arch/TriCore/TriCoreInstrInfo.td
 2023-04-14 00:34:38 +08:00
billow
1968699d4d add: 
- `DEXTR*`
- `DISABLE*`
- `DSYNC*`
- `DVADJ*`
- `DIV*`
- `DVINIT*`
- `DVSTEP*`
- `ENABLE*`
- `EQ*`
 2023-04-14 00:34:38 +08:00
billow
f8c7dc474f add: 
- `CALL*`
- `CL*`
- `CMOV*`
- `CMPSWAP_W`
- `CRC*`
- `CSUB*`
- `DEBUG*`
 2023-04-14 00:34:37 +08:00
billow
f7175332ba add cadd 2023-04-14 00:34:36 +08:00
billow
688ee6a07c add cache inst 2023-04-14 00:34:35 +08:00
billow
69e051687a add AND 2023-04-14 00:34:34 +08:00
billow
b5b456b4f4 add more ADD 2023-04-14 00:34:33 +08:00
billow
96aec6be49 Add more multiclass 2023-04-14 00:34:32 +08:00
billow
ed94f7fcfc add more ADD 2023-04-14 00:34:31 +08:00
billow
175691f2cf add ABS 2023-04-14 00:34:30 +08:00
billow
e6513b26ad add TriCore tablegen files 2023-04-14 00:34:30 +08:00
billow
d1021f4a6b Fix build and test 2023-04-14 00:34:28 +08:00
Sidney Pontes Filho
81b1df7f91 Transfer modifications of TriDis/llvm-tricore on Feb, 04 2017 2023-04-14 00:34:25 +08:00
Sidney Pontes Filho
707c57b921 Fix TriCore register mapping 2023-04-14 00:34:23 +08:00
Sidney Pontes Filho
8ea8d69cc5 Fix TriCore Mapping 2023-04-14 00:34:23 +08:00
Sidney Pontes Filho
72cdfdab80 Adjustments in TriCore and add more instructions into tests/test_tricore.c 2023-04-14 00:34:22 +08:00
Sidney Pontes Filho
651aa5a1f1 Fix memory access printing and clean unused functions 2023-04-14 00:34:21 +08:00