Commit Graph

18071 Commits

Author SHA1 Message Date
Richard Osborne
35150cbf41 Add instruction encodings / disassembly support for rus instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170330 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 13:50:04 +00:00
Richard Osborne
ff6114e872 Add instruction encodings for ZEXT and SEXT.
Previously these were marked with the wrong format.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170327 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 13:20:37 +00:00
Richard Osborne
1ffe48a84b Add instruction encodings / disassembly support for 2r instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170323 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 12:29:31 +00:00
Richard Osborne
dd78daa199 Add instruction encodings / disassembly support for 0r instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170322 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 12:26:29 +00:00
Craig Topper
b72ae70036 Add rest of BMI/BMI2 instructions to the folding tables as well as popcnt and lzcnt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170304 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 05:02:29 +00:00
Chandler Carruth
17c84ea594 Fix the first part of PR14478: memset now works.
PR14478 highlights a serious problem in SROA that simply wasn't being
exercised due to a lack of vector input code mixed with C-library
function calls. Part of SROA was written carefully to handle subvector
accesses via memset and memcpy, but the rewriter never grew support for
this. Fixing it required refactoring the subvector access code in other
parts of SROA so it could be shared, and then fixing the splat formation
logic and using subvector insertion (this patch).

The PR isn't quite fixed yet, as memcpy is still broken in the same way.
I'm starting on that series of patches now.

Hopefully this will be enough to bring the bullet benchmark back to life
with the bb-vectorizer enabled, but that may require fixing memcpy as
well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170301 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-17 04:07:37 +00:00
Richard Osborne
e4e0089e45 Add tests for disassembly of 1r XCore instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170295 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-16 18:06:30 +00:00
Reed Kotler
2c3a4641a7 This patch is needed to make c++ exceptions work for mips16.
Mips16 is really a processor decoding mode (ala thumb 1) and in the same
program, mips16 and mips32 functions can exist and can call each other.

If a jal type instruction encounters an address with the lower bit set, then
the processor switches to mips16 mode (if it is not already in it). If the
lower bit is not set, then it switches to mips32 mode.

The linker knows which functions are mips16 and which are mips32.
When relocation is performed on code labels, this lower order bit is
set if the code label is a mips16 code label.

In general this works just fine, however when creating exception handling
tables and dwarf, there are cases where you don't want this lower order
bit added in.

This has been traditionally distinguished in gas assembly source by using a
different syntax for the label.

lab1:      ; this will cause the lower order bit to be added
lab2=.     ; this will not cause the lower order bit to be added

In some cases, it does not matter because in dwarf and debug tables
the difference of two labels is used and in that case the lower order
bits subtract each other out.

To fix this, I have added to mcstreamer the notion of a debuglabel.
The default is for label and debug label to be the same. So calling
EmitLabel and EmitDebugLabel produce the same result.

For various reasons, there is only one set of labels that needs to be
modified for the mips exceptions to work. These are the "$eh_func_beginXXX" 
labels.

Mips overrides the debug label suffix from ":" to "=." .

This initial patch fixes exceptions. More changes most likely
will be needed to DwarfCFException to make all of this work
for actual debugging. These changes will be to emit debug labels in some
places where a simple label is emitted now.

Some historical discussion on this from gcc can be found at:
http://gcc.gnu.org/ml/gcc-patches/2008-08/msg00623.html
http://gcc.gnu.org/ml/gcc-patches/2008-11/msg01273.html 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170279 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-16 04:00:45 +00:00
Benjamin Kramer
388fc6a988 X86: Add a couple of target-specific dag combines that turn VSELECTS into psubus if possible.
We match the pattern "x >= y ? x-y : 0" into "subus x, y" and two special cases
if y is a constant. DAGCombiner canonicalizes those so we first have to undo the
canonicalization for those cases. The pattern occurs in gzip when the loop
vectorizer is enabled. Part of PR14613.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170273 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-15 16:47:44 +00:00
Chandler Carruth
d12de95585 Add a corollary test for PR14572. We got this code path correct already.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170271 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-15 09:31:54 +00:00
Chandler Carruth
19820053fe Relax an overly aggressive assert to fix PR14572.
The alloca width is based on the alloc size, not the type size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170270 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-15 09:26:06 +00:00
Reed Kotler
ed23fa8e55 This code implements most of mips16 hardfloat as it is done by gcc.
In this case, essentially it is soft float with different library routines.
The next step will be to make this fully interoperational with mips32 floating
point and that requires creating stubs for functions with signatures that
contain floating point types.

I have a more sophisticated design for mips16 hardfloat which I hope to
implement at a later time that directly does floating point without the need
for function calls.

The mips16 encoding has no floating point instructions so one needs to
switch to mips32 mode to execute floating point instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170259 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-15 00:20:05 +00:00
Kevin Enderby
a827a47923 Make sure the alternate PC+imm syntax of LDR instruction with a small
immediate generates the narrow version.  Needed when doing round-trip
assemble/disassemble testing using the alternate syntax that specifies
'pc' directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170255 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-14 23:04:25 +00:00
Michael Ilseman
07acee7a09 Add back FoldOpIntoPhi optimizations with fix. Included test cases to help catch these errors and to test the presence of the optimization itself
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170248 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-14 22:08:26 +00:00
Nadav Rotem
0a1e914f8f TypeLegalizer: Do not generate target specific nodes with illegal types, because we cant type-legalize them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170245 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-14 21:20:37 +00:00
Nadav Rotem
fd360c3e24 Fix a crash in ValueTracking on vectors of pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170240 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-14 20:43:49 +00:00
Bill Schmidt
d3eb4f46f0 This patch removes some nondeterminism from direct object file output
for TLS dynamic models on 64-bit PowerPC ELF.  The default sort routine
for relocations only sorts on the r_offset field; but with TLS, there
can be two relocations with the same r_offset.  For PowerPC, this patch
sorts secondarily on descending r_type, which matches the behavior
expected by the linker.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170237 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-14 20:28:38 +00:00
Shuxin Yang
a5ed031fbc rdar://12753946
Implement rule : "x * (select cond 1.0, 0.0) -> select cond x, 0.0"


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170226 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-14 18:46:06 +00:00
Bill Schmidt
b453e16855 This patch improves the 64-bit PowerPC InitialExec TLS support by providing
for a wider range of GOT entries that can hold thread-relative offsets.
This matches the behavior of GCC, which was not documented in the PPC64 TLS
ABI.  The ABI will be updated with the new code sequence.

Former sequence:

  ld 9,x@got@tprel(2)
  add 9,9,x@tls

New sequence:

  addis 9,2,x@got@tprel@ha
  ld 9,x@got@tprel@l(9)
  add 9,9,x@tls

Note that a linker optimization exists to transform the new sequence into
the shorter sequence when appropriate, by replacing the addis with a nop
and modifying the base register and relocation type of the ld.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170209 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-14 17:02:38 +00:00
Evgeniy Stepanov
63cca4e2fd [msan] Origin stores and loads do not need explicit alignment.
Origin address is always 4 byte aligned, and the access type is always i32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170199 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-14 13:43:11 +00:00
David Blaikie
01bc2b39a4 Debug Info: add support to mark member variables as artificial
This is the LLVM portion of r170154.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170156 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 22:43:07 +00:00
NAKAMURA Takumi
bb9004e0dc Revert r170020, "Simplify negated bit test", for now.
This assumes (1 << n) is always not zero. Consider n is greater than word size.
Although I know it is undefined, this transforms undefined behavior hidden.

This led clang unexpected behavior with some failures. I will investigate to fix undefined shl in clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170128 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 14:28:16 +00:00
Akira Hatanaka
ed185daba7 [mips] Do not copy GOT address to register $gp if the function being called has
internal linkage.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170092 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 03:17:29 +00:00
Eli Bendersky
25953bfb07 Make this Lit config file a bit slimmer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170083 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 02:03:46 +00:00
Evan Cheng
9a65a01eeb Fix a bug in DAGCombiner::MatchBSwapHWord. Make sure the node has operands before referencing them. rdar://12868039
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170078 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 01:34:32 +00:00
Quentin Colombet
fcc934322b Take into account minimize size attribute in the inliner.
Better controls the inlining of functions when the caller function has MinSize attribute.
Basically, when the caller function has this attribute, we do not "force" the inlining
of callee functions carrying the InlineHint attribute (i.e., functions defined with
inline keyword)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170065 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 01:05:25 +00:00
Nadav Rotem
807dad62a0 Teach the cost model about the optimization in r169904: Truncation of induction variables costs the same as scalar trunc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170051 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-13 00:21:03 +00:00
Jakub Staszak
6b0f123b89 Fix typo, which prevent test from being check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170025 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 21:10:56 +00:00
Jakub Staszak
8b65f82292 unHECKify test fixed by Jacob in r159003.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170023 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 20:58:42 +00:00
David Majnemer
63522b1998 Simplify negated bit test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170020 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 20:48:54 +00:00
Evan Cheng
a16e49d56f Fix a logic bug in inline expansion of memcpy / memset with an overlapping
load / store pair. It's not legal to use a wider load than the size of
the remaining bytes if it's the first pair of load / store.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170018 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 20:43:23 +00:00
Jakub Staszak
94aa3bd0c1 unHECKify test. It was fixed by Chris in 2009.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170017 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 20:43:00 +00:00
Bill Schmidt
71fe60ef10 The ordering of two relocations on the same instruction is apparently not
predictable when compiled on at least one non-PowerPC host.  Source of
nondeterminism not apparent.  Restrict the test to build on PowerPC hosts
for now while looking into the issue further.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170016 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 20:29:20 +00:00
Jakub Staszak
728fbdb796 Fix typo in test-case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170015 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 20:29:06 +00:00
Jakub Staszak
9c08510696 Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170006 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 19:47:04 +00:00
Nadav Rotem
ae3b652f5c LoopVectorizer: Use the "optsize" attribute to decide if we are allowed to increase the function size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170004 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 19:29:45 +00:00
Bill Schmidt
349c2787cf This patch implements local-dynamic TLS model support for the 64-bit
PowerPC target.  This is the last of the four models, so we now have 
full TLS support.

This is mostly a straightforward extension of the general dynamic model.
I had to use an additional Chain operand to tie ADDIS_DTPREL_HA to the
register copy following ADDI_TLSLD_L; otherwise everything above the
ADDIS_DTPREL_HA appeared dead and was removed.

As before, there are new test cases to test the assembly generation, and
the relocations output during integrated assembly.  The expected code
gen sequence can be read in test/CodeGen/PowerPC/tls-ld.ll.

There are a couple of things I think can be done more efficiently in the
overall TLS code, so there will likely be a clean-up patch forthcoming;
but for now I want to be sure the functionality is in place.

Bill


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170003 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 19:29:35 +00:00
Alexey Samsonov
1afbb51796 Improve debug info generated with enabled AddressSanitizer.
When ASan replaces <alloca instruction> with
<offset into a common large alloca>, it should also patch
llvm.dbg.declare calls and replace debug info descriptors to mark
that we've replaced alloca with a value that stores an address
of the user variable, not the user variable itself.

See PR11818 for more context.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169984 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 14:31:53 +00:00
NAKAMURA Takumi
bd85f1004d llvm/test/CodeGen/X86/atom-bypass-slow-division.ll: Fix possible typo(s) in CHECK-NOT lines.
Found by Alexander Zinenko, thanks!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169978 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 13:34:20 +00:00
NAKAMURA Takumi
1a7b4a967d llvm/test/CodeGen/X86/atom-bypass-slow-division.ll: Rename symbols, s/test_/Test/g, not to mismatch "CHECK(-NOT): test".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169977 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 13:34:14 +00:00
NAKAMURA Takumi
2ab2421a4e llvm/test/CodeGen/X86/store_op_load_fold.ll: Fix typo, s/CHECK_NEXT/CHECK-NEXT/
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169957 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 01:41:01 +00:00
NAKAMURA Takumi
87de1e72cb llvm/test/CodeGen/X86/store_op_load_fold.ll: Add explicit triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169956 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 01:40:56 +00:00
Manman Ren
981b96376a DAGCombine: clamp hi bit in APInt::getBitsSet to avoid assertion
rdar://12838504


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169951 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 01:13:50 +00:00
Evan Cheng
61f4dfe369 Avoid using lossy load / stores for memcpy / memset expansion. e.g.
f64 load / store on non-SSE2 x86 targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169944 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 00:42:09 +00:00
Shuxin Yang
5f70c2e934 - Fix a problematic way in creating all-the-1 APInt.
- Propagate "exact" bit of [l|a]shr instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169942 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 00:29:03 +00:00
Michael Ilseman
09ee250e72 Added a slew of SimplifyInstruction floating-point optimizations, many of which take advantage of fast-math flags. Test cases included.
fsub X, +0 ==> X
  fsub X, -0 ==> X, when we know X is not -0
  fsub +/-0.0, (fsub -0.0, X) ==> X
  fsub nsz +/-0.0, (fsub +/-0.0, X) ==> X
  fsub nnan ninf X, X ==> 0.0
  fadd nsz X, 0 ==> X
  fadd [nnan ninf] X, (fsub [nnan ninf] 0, X) ==> 0
    where nnan and ninf have to occur at least once somewhere in this expression
  fmul X, 1.0 ==> X



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169940 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-12 00:27:46 +00:00
Nadav Rotem
655d2c5354 PR14574. Fix a bug in the code that calculates the mask the converted PHIs in if-conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169916 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 21:30:14 +00:00
Tom Stellard
f98f2ce29e Add R600 backend
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169915 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 21:25:42 +00:00
Bill Schmidt
57ac1f458a This patch implements the general dynamic TLS model for 64-bit PowerPC.
Given a thread-local symbol x with global-dynamic access, the generated
code to obtain x's address is:

     Instruction                            Relocation            Symbol
  addis ra,r2,x@got@tlsgd@ha           R_PPC64_GOT_TLSGD16_HA       x
  addi  r3,ra,x@got@tlsgd@l            R_PPC64_GOT_TLSGD16_L        x
  bl __tls_get_addr(x@tlsgd)           R_PPC64_TLSGD                x
                                       R_PPC64_REL24           __tls_get_addr
  nop
  <use address in r3>

The implementation borrows from the medium code model work for introducing
special forms of ADDIS and ADDI into the DAG representation.  This is made
slightly more complicated by having to introduce a call to the external
function __tls_get_addr.  Using the full call machinery is overkill and,
more importantly, makes it difficult to add a special relocation.  So I've
introduced another opcode GET_TLS_ADDR to represent the function call, and
surrounded it with register copies to set up the parameter and return value.

Most of the code is pretty straightforward.  I ran into one peculiarity
when I introduced a new PPC opcode BL8_NOP_ELF_TLSGD, which is just like
BL8_NOP_ELF except that it takes another parameter to represent the symbol
("x" above) that requires a relocation on the call.  Something in the 
TblGen machinery causes BL8_NOP_ELF and BL8_NOP_ELF_TLSGD to be treated
identically during the emit phase, so this second operand was never
visited to generate relocations.  This is the reason for the slightly
messy workaround in PPCMCCodeEmitter.cpp:getDirectBrEncoding().

Two new tests are included to demonstrate correct external assembly and
correct generation of relocations using the integrated assembler.

Comments welcome!

Thanks,
Bill


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169910 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 20:30:11 +00:00
Nadav Rotem
5e9efa10fc Loop Vectorize: optimize the vectorization of trunc(induction_var). The truncation is now done on scalars.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169904 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 18:58:10 +00:00
NAKAMURA Takumi
f38833c7ad llvm/test/TableGen: Remove XFAIL:vg_leak in dozen of tests, according to llvm-x86_64-linux-vg_leak.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169862 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 13:14:16 +00:00
Hao Liu
659dacd66f revert the test change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169823 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 06:25:18 +00:00
Hao Liu
7fc66a22d8 A newbie try a test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169821 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 06:22:54 +00:00
Nadav Rotem
cfb6285fdb Fix PR14565. Don't if-convert loops that have switch statements in them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169813 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 04:55:10 +00:00
Chad Rosier
1ad9253c9d Add a triple to this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169803 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 00:51:36 +00:00
Chandler Carruth
1c49fda408 Fix a miscompile in the DAG combiner. Previously, we would incorrectly
try to reduce the width of this load, and would end up transforming:

  (truncate (lshr (sextload i48 <ptr> as i64), 32) to i32)
to
  (truncate (zextload i32 <ptr+4> as i64) to i32)

We lost the sext attached to the load while building the narrower i32
load, and replaced it with a zext because lshr always zext's the
results. Instead, bail out of this combine when there is a conflict
between a sextload and a zext narrowing. The rest of the DAG combiner
still optimize the code down to the proper single instruction:

  movswl 6(...),%eax

Which is exactly what we wanted. Previously we read past the end *and*
missed the sign extension:

  movl 6(...), %eax

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169802 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 00:36:57 +00:00
Paul Redmond
0a0990af1c move X86-specific test
This test case uses -mcpu=corei7 so it belongs in CodeGen/X86

Reviewed by: Nadav


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169801 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 00:36:43 +00:00
Chad Rosier
425e951734 Fall back to the selection dag isel to select tail calls.
This shouldn't affect codegen for -O0 compiles as tail call markers are not
emitted in unoptimized compiles.  Testing with the external/internal nightly
test suite reveals no change in compile time performance.  Testing with -O1,
-O2 and -O3 with fast-isel enabled did not cause any compile-time or
execution-time failures.  All tests were performed on my x86 machine.
I'll monitor our arm testers to ensure no regressions occur there.

In an upcoming clang patch I will be marking the objc_autoreleaseReturnValue
and objc_retainAutoreleaseReturnValue as tail calls unconditionally.  While
it's theoretically true that this is just an optimization, it's an
optimization that we very much want to happen even at -O0, or else ARC
applications become substantially harder to debug.

Part of rdar://12553082

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169796 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 00:18:02 +00:00
Eric Christopher
0e3e9b79f6 Refactor out the abbreviation handling into a separate class that
controls each of the abbreviation sets (only a single one at the
moment) and computes offsets separately as well for each set
of DIEs.

No real function change, ordering of abbreviations for the skeleton
CU changed but only because we're computing in a separate order. Fix
the testcase not to care.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169793 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-10 23:34:43 +00:00
Evan Cheng
376642ed62 Some enhancements for memcpy / memset inline expansion.
1. Teach it to use overlapping unaligned load / store to copy / set the trailing
   bytes. e.g. On 86, use two pairs of movups / movaps for 17 - 31 byte copies.
2. Use f64 for memcpy / memset on targets where i64 is not legal but f64 is. e.g.
   x86 and ARM.
3. When memcpy from a constant string, do *not* replace the load with a constant
   if it's not possible to materialize an integer immediate with a single
   instruction (required a new target hook: TLI.isIntImmLegal()).
4. Use unaligned load / stores more aggressively if target hooks indicates they
   are "fast".
5. Update ARM target hooks to use unaligned load / stores. e.g. vld1.8 / vst1.8.
   Also increase the threshold to something reasonable (8 for memset, 4 pairs
   for memcpy).

This significantly improves Dhrystone, up to 50% on ARM iOS devices.

rdar://12760078


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169791 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-10 23:21:26 +00:00
Arnold Schwaighofer
2b475922e6 Optimistically analyse Phi cycles
Analyse Phis under the starting assumption that they are NoAlias. Recursively
look at their inputs.
If they MayAlias/MustAlias there must be an input that makes them so.

Addresses bug 14351.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169788 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-10 23:02:41 +00:00
Eli Bendersky
e1dee8a06e Add a test for explicitly exercising the mc-relax-all flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169764 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-10 20:36:01 +00:00
Eric Christopher
4daaed1c70 Use the somewhat semantic term "split dwarf" it more matches what's
going on and makes a lot of the terminology in comments make more sense.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169758 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-10 19:51:21 +00:00
Nadav Rotem
f0d19bd129 Add support for reverse induction variables. For example:
while (i--)
 sum+=A[i];



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169752 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-10 19:25:06 +00:00
Hal Finkel
f21831073c Use GetUnderlyingObjects in misched
misched used GetUnderlyingObject in order to break false load/store
dependencies, and the -enable-aa-sched-mi feature similarly relied on
GetUnderlyingObject in order to ensure it is safe to use the aliasing analysis.
Unfortunately, GetUnderlyingObject does not recurse through phi nodes, and so
(especially due to LSR) all of these mechanisms failed for
induction-variable-dependent loads and stores inside loops.

This change replaces uses of GetUnderlyingObject with GetUnderlyingObjects
(which will recurse through phi and select instructions) in misched.

Andy reviewed, tested and simplified this patch; Thanks!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169744 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-10 18:49:16 +00:00
Craig Topper
48b509c773 Teach DAG combine to handle vector add/sub with vectors of all 0s.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169727 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-10 08:12:29 +00:00
Chandler Carruth
3d9afa8e97 Fix PR14548: SROA was crashing on a mixture of i1 and i8 loads and stores.
When SROA was evaluating a mixture of i1 and i8 loads and stores, in
just a particular case, it would tickle a latent bug where we compared
bits to bytes rather than bits to bits. As a consequence of the latent
bug, we would allow integers through which were not byte-size multiples,
a situation the later rewriting code was never intended to handle.

In release builds this could trigger all manner of oddities, but the
reported issue in PR14548 was forming invalid bitcast instructions.

The only downside of this fix is that it makes it more clear that SROA
in its current form is not capable of handling mixed i1 and i8 loads and
stores. Sometimes with the previous code this would work by luck, but
usually it would crash, so I'm not terribly worried. I'll watch the LNT
numbers just to be sure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169719 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-10 00:54:45 +00:00
Paul Redmond
880166684e LoopVectorize: support vectorizing intrinsic calls
- added function to VectorTargetTransformInfo to query cost of intrinsics
- vectorize trivially vectorizable intrinsic calls such as sin, cos, log, etc.

Reviewed by: Nadav


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169711 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-09 20:42:17 +00:00
Benjamin Kramer
f81093a826 Drop the address space limit for tests in the makefile build.
The limit seems to break newer pythons (see PR13598) so just drop it for now.
Eventually lit should learn to set limits for its children instead of a global
limit in the makefile.

If some PPC bots fail after this change: That's a good thing, they actually run
clang tests now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169695 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-09 10:34:22 +00:00
Shuxin Yang
5518a1355b - Re-enable population count loop idiom recognization
- fix a bug which cause sigfault.
- add two testing cases which was causing crash


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169687 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-09 03:12:46 +00:00
Craig Topper
9472b4fbf9 Teach DAG combine to handle vector logical operations with vectors of all 1s or all 0s. These cases can show up when vectors are split for legalizing. Fix some tests that were dependent on these cases not being combined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169684 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-08 22:49:19 +00:00
Chandler Carruth
7065a2bcec Revert the patches adding a popcount loop idiom recognition pass.
There are still bugs in this pass, as well as other issues that are
being worked on, but the bugs are crashers that occur pretty easily in
the wild. Test cases have been sent to the original commit's review
thread.

This reverts the commits:
  r169671: Fix a logic error.
  r169604: Move the popcnt tests to an X86 subdirectory.
  r168931: Initial commit adding the pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169683 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-08 22:18:29 +00:00
Nadav Rotem
af59e9adbd When we use the BLEND instruction that uses the MSB as a mask, we can remove
the VSRI instruction before it since it does not affect the MSB.

Thanks Craig Topper for suggesting this.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169638 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-07 21:43:11 +00:00
Matthew Curtis
ade50dc6c7 In hexagon convertToHardwareLoop, don't deref end() iterator
In particular, check if MachineBasicBlock::iterator is end() before
using it to call getDebugLoc();

See also this thread on llvm-commits:
   http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20121112/155914.html


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169634 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-07 21:03:15 +00:00
Nadav Rotem
e4ccfef809 X86: Prefer using VPSHUFD over VPERMIL because it has better throughput.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169624 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-07 19:01:13 +00:00
Eli Bendersky
8ddc5a1929 Add separate statistics for Data and Inst fragments emitted during relaxation.
Also fixes a test that was overly-sensitive to the exact order of statistics
emitted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169619 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-07 17:59:21 +00:00
Tim Northover
6eb3e87df0 Added Mapping Symbols for ARM ELF
Before this patch, when you objdump an LLVM-compiled file, objdump tried to
decode data-in-code sections as if they were code.  This patch adds the missing
Mapping Symbols, as defined by "ELF for the ARM Architecture" (ARM IHI 0044D).

Patch based on work by Greg Fitzgerald.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169609 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-07 16:50:23 +00:00
David Tweed
9f90c73415 The test unconditionally assumes a particular cpu has a backend build in the target.
Buildbots for some hosts may choose to build only their own backend in order to
maximise testing-turnaround time. Move the test into a prefixed directory so
lit's standard "backend specific" suppression can be done.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169604 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-07 15:57:45 +00:00
Chandler Carruth
70d3bebc8b Add support to ValueTracking for determining that a pointer is non-null
by virtue of inbounds GEPs that preclude a null pointer.

This is a very common pattern in the code generated by std::vector and
other standard library routines which use allocators that test for null
pervasively. This is one step closer to teaching Clang+LLVM to be able
to produce an empty function for:

  void f() {
    std::vector<int> v;
    v.push_back(1);
    v.push_back(2);
    v.push_back(3);
    v.push_back(4);
  }

Which is related to getting them to completely fold SmallVector
push_back sequences into constants when inlining and other optimizations
make that a possibility.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169573 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-07 02:08:58 +00:00
Dmitri Gribenko
00e97c2126 Fix typos in CHECK lines.
Patch by Alexander Zinenko.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169547 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06 21:24:47 +00:00
Nadav Rotem
dde785cd70 Fix a bug in the code that merges consecutive stores. Previously we did not
check if loads that happen in between stores alias with the first store in the
chain, only with the second store onwards.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169516 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06 17:34:13 +00:00
Evgeniy Stepanov
4031b194ac [msan] Do not store origin for clean values.
Instead of unconditionally storing origin with every application store,
only do this when the shadow of the stored value is != 0.

This change also delays instrumentation of stores until after the walk over
function's instructions, because adding new basic blocks confuses InstVisitor.

We only keep 1 origin value per 4 bytes of application memory. This change
fixes the bug when a store of a single clean byte wiped the origin for the
whole 4-byte area.

Since stores of uninitialized values are relatively uncommon, this change
improves performance of track-origins mode by 5% median and by up to 47% on
specs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169490 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06 11:41:03 +00:00
Bill Wendling
222c2fd60d Handle non-default array bounds.
Some languages, e.g. Ada and Pascal, allow you to specify that the array bounds
are different from the default (1 in these cases). If we have a lower bound
that's non-default, then we emit the lower bound. We also calculate the correct
upper bound in those cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169484 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06 07:38:10 +00:00
Craig Topper
da92646875 Remove intrinsic specific instructions for (V)MOVQUmr with patterns pointing to the normal instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169482 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06 07:31:16 +00:00
Evan Cheng
824ec7d01a Properly fix the tes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169464 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06 02:29:29 +00:00
NAKAMURA Takumi
e1ab8e3e73 llvm/test/CodeGen/ARM/extload-knownzero.ll: Try to unbreak, to add -O0. I guess Chad expects fastisel here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169463 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06 02:22:58 +00:00
Chad Rosier
c9758b1366 [arm fast-isel] Make the fast-isel implementation of memcpy respect alignment.
rdar://12821569

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169460 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06 01:34:31 +00:00
Evan Cheng
8a7186dbc2 Let targets provide hooks that compute known zero and ones for any_extend
and extload's. If they are implemented as zero-extend, or implicitly
zero-extend, then this can enable more demanded bits optimizations. e.g.

define void @foo(i16* %ptr, i32 %a) nounwind {
entry:
  %tmp1 = icmp ult i32 %a, 100
  br i1 %tmp1, label %bb1, label %bb2
bb1:
  %tmp2 = load i16* %ptr, align 2
  br label %bb2
bb2:
  %tmp3 = phi i16 [ 0, %entry ], [ %tmp2, %bb1 ]
  %cmp = icmp ult i16 %tmp3, 24
  br i1 %cmp, label %bb3, label %exit
bb3:
  call void @bar() nounwind
  br label %exit
exit:
  ret void
}

This compiles to the followings before:
        push    {lr}
        mov     r2, #0
        cmp     r1, #99
        bhi     LBB0_2
@ BB#1:                                 @ %bb1
        ldrh    r2, [r0]
LBB0_2:                                 @ %bb2
        uxth    r0, r2
        cmp     r0, #23
        bhi     LBB0_4
@ BB#3:                                 @ %bb3
        bl      _bar
LBB0_4:                                 @ %exit
        pop     {lr}
        bx      lr

The uxth is not needed since ldrh implicitly zero-extend the high bits. With
this change it's eliminated.

rdar://12771555


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169459 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-06 01:28:01 +00:00
Richard Smith
c15e5b0a0d PR10867: Analogue of r169441 for when using external 'sh'. And actually run the test!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169446 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 23:15:33 +00:00
Richard Smith
00fb9c429e PR10867. lit would interpret
RUN: a
  RUN: b || true

as "a && (b || true)" in Tcl mode, and as "(a && b) || true" in sh mode.
Everyone seems to (quite reasonably) write tests assuming the Tcl behavior,
so use that in sh mode too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169441 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 22:54:26 +00:00
Andrew Trick
f3329c419b RegisterPressureTracker: fix findUseBetween to handle DebugValue
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169427 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 21:37:50 +00:00
Andrew Trick
553c42cefc RegisterPresssureTracker: Track live physical register by unit.
This is much simpler to reason about, more efficient, and
fixes some corner cases involving implicit super-register defs.
Fixed rdar://12797931.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169425 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 21:37:42 +00:00
Nadav Rotem
0602bb4659 Cost Model: change the default cost of control flow instructions (br / ret / ...) to zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169423 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 21:21:26 +00:00
David Sehr
f2a1c83c86 Correct ARM NOP encoding
The encoding of NOP in ARMAsmBackend.cpp is missing a trailing zero, which
causes the emission of a coprocessor instruction rather than "mov r0, r0"
as indicated in the comment.  The test also checks for the wrong encoding.

http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20121203/157919.html



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169420 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 21:01:27 +00:00
Justin Holewinski
2f1086137d [NVPTX] Fix crash with unnamed struct arguments
Patch by Eric Holk

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169418 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 20:50:28 +00:00
Michael J. Spencer
eef7b6219e Add dump of Win64 EH unwind data.
The new command line option -unwind-info dumps the Win64 EH unwind
data to the console. This is a nice feature if you need to debug
generated EH data (e.g. from LLVM). Includes a test case.

Initial patch by João Matos, extensions and rework by Kai Nacke.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169415 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 20:12:35 +00:00
David Sehr
d224f28437 Test commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169410 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 19:47:56 +00:00
Jyotsna Verma
61b632d9f7 Use multiclass to define store instructions with base+immediate offset
addressing mode and immediate stored value.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169408 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 19:32:03 +00:00
Kevin Enderby
14ccc9007a Added a option to the disassembler to print immediates as hex.
This is for the lldb team so most of but not all of the values are
to be printed as hex with this option.  Some small values like the
scale in an X86 address were requested to printed in decimal
without the leading 0x.

There may be some tweaks need to places that may still be in
decimal that they want in hex.  Specially for arm.  I made my best
guess.  Any tweaks from here should be simple.

I also did the best I know now with help from the C++ gurus
creating the cleanest formatImm() utility function and containing
the changes.  But if someone has a better idea to make something
cleaner I'm all ears and game for changing the implementation.

rdar://8109283



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169393 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 18:13:19 +00:00
Evgeniy Stepanov
1e3b656be5 [msan] Instrument bswap intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169383 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 14:39:55 +00:00
Evgeniy Stepanov
61cac0619a [msan] Change linkage type of __msan_track_origins.
LinkOnceODRLinkage globals may be removed in GlobalOpt if not used in the
current module.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169377 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 12:49:41 +00:00
Elena Demikhovsky
226e0e6264 Simplified BLEND pattern matching for shuffles.
Generate VPBLENDD for AVX2 and VPBLENDW for v16i16 type on AVX2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169366 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 09:24:57 +00:00
Shuxin Yang
00fab97c01 fix a typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169345 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 00:33:16 +00:00
Evan Cheng
4e54480531 Add x86 isel lowering logic to form bit test with inverted condition. e.g.
x ^ -1.

Patch by David Majnemer.
rdar://12755626


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169339 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 00:10:38 +00:00
Evan Cheng
c8e7045c8a ARM custom lower ctpop for vector types. Patch by Pete Couperus.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169325 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 22:41:50 +00:00
Nadav Rotem
e570dee4b0 Fix a bug in vectorization of if-converted reduction variables. If the
reduction variable is not used outside the loop then we ran into an
endless loop. This change checks if we found the original PHI.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169324 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 22:40:22 +00:00
Shuxin Yang
a09e18fcfa For rdar://12329730, last piece.
This change attempts to simplify (X^Y) -> X or Y in the user's context if we know that
only bits from X or Y are demanded.

  A minimized case is provided bellow. This change will simplify "t>>16" into "var1 >>16".

  =============================================================
  unsigned foo (unsigned val1, unsigned val2) {
    unsigned t = val1 ^ 1234;
    return (t >> 16) | t; // NOTE: t is used more than once.
  }
  =============================================================

  Note that if the "t" were used only once, the expression would be finally optimized as well.
However, with with this change, the optimization will take place earlier.

  Reviewed by Nadav, Thanks a lot!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169317 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 22:15:32 +00:00
Bill Wendling
9493dae613 Use the 'count' attribute to calculate the upper bound of an array.
The count attribute is more accurate with regards to the size of an array. It
also obviates the upper bound attribute in the subrange. We can also better
handle an unbound array by setting the count to -1 instead of the lower bound to
1 and upper bound to 0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169312 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 21:34:03 +00:00
David Blaikie
b36c531653 Reapply r160148 (reverted in r163570) fixing spurious breakpoints in modern GDB
This reapplies the fix for PR13303 now with more justification. Based on my
execution of the GDB 7.5 test suite this results in:

expected passes: 16101 -> 20890 (+30%)
unexpected failures: 4826 -> 637 (-77%)

There are 23 checks that used to pass and now fail. They are all in
gdb.reverse. Investigating a few looks like they were accidentally passing
due to extra breakpoints being set by this bug. They're generally due to the
difference in end location between gcc and clang, the test suite is trying to
set breakpoints on the closing '}' that clang doesn't associate with any
instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169304 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 21:05:36 +00:00
Nadav Rotem
f6088d126e Add support for reduction variables when IF-conversion is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169288 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 18:17:33 +00:00
Eli Bendersky
a790bc12c1 A test in thid directory was not being run because lit.local.cfg didn't
include .ll files. Fix that.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169283 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 17:00:11 +00:00
Bill Schmidt
d7802bf0dd This patch introduces initial-exec model support for thread-local storage
on 64-bit PowerPC ELF.

The patch includes code to handle external assembly and MC output with the
integrated assembler.  It intentionally does not support the "old" JIT.

For the initial-exec TLS model, the ABI requires the following to calculate
the address of external thread-local variable x:

 Code sequence            Relocation                  Symbol
  ld 9,x@got@tprel(2)      R_PPC64_GOT_TPREL16_DS      x
  add 9,9,x@tls            R_PPC64_TLS                 x

The register 9 is arbitrary here.  The linker will replace x@got@tprel
with the offset relative to the thread pointer to the generated GOT
entry for symbol x.  It will replace x@tls with the thread-pointer
register (13).

The two test cases verify correct assembly output and relocation output
as just described.

PowerPC-specific selection node variants are added for the two
instructions above:  LD_GOT_TPREL and ADD_TLS.  These are inserted
when an initial-exec global variable is encountered by
PPCTargetLowering::LowerGlobalTLSAddress(), and later lowered to
machine instructions LDgotTPREL and ADD8TLS.  LDgotTPREL is a pseudo
that uses the same LDrs support added for medium code model's LDtocL,
with a different relocation type.

The rest of the processing is straightforward.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169281 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 16:18:08 +00:00
Evgeniy Stepanov
f76bd101fe Improve MSan tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169256 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 11:42:05 +00:00
Bill Wendling
a7645a3c66 Add a 'count' field to the DWARF subrange.
The count field is necessary because there isn't a difference between the 'lo'
and 'hi' attributes for a one-element array and a zero-element array. When the
count is '0', we know that this is a zero-element array. When it's >=1, then
it's a normal constant sized array. When it's -1, then the array is unbounded.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169218 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 06:20:49 +00:00
Nadav Rotem
319d594e22 Add the last part that is needed for vectorization of if-converted code.
Added the code that actually performs the if-conversion during vectorization.

We can now vectorize this code:

for (int i=0; i<n; ++i) {
  unsigned k = 0;

  if (a[i] > b[i])   <------ IF inside the loop.
    k = k * 5 + 3;

  a[i] = k;          <---- K is a phi node that becomes vector-select.
}



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169217 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 06:15:11 +00:00
Shuxin Yang
bba3eb054a rdar://12329730 (2nd part, revised)
The type of shirt-right (logical or arithemetic) should remain unchanged 
when transforming  "X << C1 >> C2" into "X << (C1-C2)"


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169209 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 03:28:32 +00:00
Alexey Samsonov
f985f44b13 ASan: add initial support for handling llvm.lifetime intrinsics in ASan - emit calls into runtime library that poison memory for local variables when their lifetime is over and unpoison memory when their lifetime begins.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169200 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 01:34:23 +00:00
Manman Ren
69261a6442 Stack Alignment: when creating stack objects in MachineFrameInfo, make sure
the alignment is clamped to TargetFrameLowering.getStackAlignment if the target
does not support stack realignment or the option "realign-stack" is off.

This will cause miscompile if the address is treated as aligned and add is
replaced with or in DAGCombine.

Added a bool StackRealignable to TargetFrameLowering to check whether stack
realignment is implemented for the target. Also added a bool RealignOption
to MachineFrameInfo to check whether the option "realign-stack" is on.

rdar://12713765


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169197 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 00:52:33 +00:00
Shuxin Yang
c811976b04 rdar://12329730 (2nd part)
This change tries to simmplify E1 = " X >> C1 << C2" into :
  - E2 = "X << (C2 - C1)" if C2 > C1, or
  - E2 = "X >> (C1 - C2)" if C1 > C2, or
  - E2 = X if C1 == C2.

 Reviewed by Nadav. Thanks!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169182 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04 00:04:54 +00:00
Eli Bendersky
ba917da3d3 Simplify this test a bit because DWARF emission/dumping on some platforms
is not yet good enough for more sophistication. The important goal of this
test is to make sure llc doesn't crash on this IR like it used to.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169146 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03 19:58:12 +00:00
Eli Bendersky
d4a05e0c2c Fix PR12942: Allow two CUs to be generated from the same source file.
Thanks Eric for the review.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169142 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03 18:45:45 +00:00
Nadav Rotem
a569a80e58 Allow merging multiple store sequences on the same chain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169111 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-02 17:14:09 +00:00
Eli Bendersky
4db6511779 Fix a bug in FileCheck that wouldn't let define variables as follows:
; CHECK: [[VAR:[a-z]]]

The problem was that to find the end of the regex var definition, it was
simplistically looking for the next ]] and finding the incorrect one. A
better approach is to count nesting of brackets (taking escaping into
account). This way the brackets that are part of the regex can be discovered
and skipped properly, and the ]] ending is detected in the right place.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169109 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-02 16:02:41 +00:00
Eli Bendersky
e469364244 Fix an invalid regex in the test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169108 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-02 15:46:02 +00:00
Eli Bendersky
9756ca7ba0 Support referencing variables defined on the same line.
See http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20121126/157198.html
and related discussions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169101 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-01 21:54:48 +00:00
Benjamin Kramer
5bded7525b SROA: Avoid struct and array types early to avoid creating an overly large integer type.
Fixes PR14465.

Differential Revision: http://llvm-reviews.chandlerc.com/D148

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169084 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-01 11:53:32 +00:00
Zhou Sheng
efcdb2944b Revert previous check in r168581, r169079 as they are still in code review status.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169083 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-01 10:54:28 +00:00
Zhou Sheng
702aa2ee19 The patch is to improve the memory footprint of pass GlobalOpt.
Also check in a case to repeat the issue, on which 'opt -globalopt' consumes 1.6GB memory.
The big memory footprint cause is that current GlobalOpt one by one hoists and stores the leaf element constant into the global array, in each iteration, it recreates the global array initializer constant and leave the old initializer alone. This may result in many obsolete constants left.
For example:  we have global array @rom = global [16 x i32] zeroinitializer
After the first element value is hoisted and installed:   @rom = global [16 x i32] [ 1, 0, 0, ... ]
After the second element value is installed:  @rom = global [16 x 32] [ 1, 2, 0, 0, ... ]        // here the previous initializer is obsolete
...
When the transform is done, we have 15 obsolete initializers left useless.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169079 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-01 04:38:53 +00:00
Andrew Trick
657b75b994 misched: Fix RegisterPressureTracker handling of DebugVals.
Assertion failed: (TopRPTracker.getPos() == RegionBegin && "bad initial Top tracker").
rdar://12790302.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169072 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-01 01:22:49 +00:00
Andrew Trick
177d87ac8d misched: Fix the DAG builder to handle an undef operand at ExitSU.
Assertion failed: (VNI && "No value to read by operand")
rdar://12790267.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169071 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-01 01:22:44 +00:00
Andrew Trick
30fe61aa35 misched: Fix LiveInterval update to better handle DebugVal.
Assertion failed: (itr != mi2iMap.end() && "Instruction not found in maps.")
rdar://12777252.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169070 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-01 01:22:41 +00:00
Andrew Trick
67bdd42d1e misched: fix RegionBegin when DebugValues get shuffled to the top.
assert (RemainingInstrs == 0 && "Instruction count mismatch!")

rdar://12776937.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169069 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-01 01:22:38 +00:00
Jakob Stoklund Olesen
8c3dccde92 Simplify REG_SEQUENCE lowering.
The TwoAddressInstructionPass takes the machine code out of SSA form by
expanding REG_SEQUENCE instructions into copies. It is no longer
necessary to rewrite the registers used by a REG_SEQUENCE instruction
because the new coalescer algorithm can do it now.

REG_SEQUENCE is just converted to a sequence of sub-register copies now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169067 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-01 01:06:44 +00:00
Eric Christopher
98e237fc69 Add some first skeleton work for the DWARF5 Fission proposal. Emit
part of the compile unit CU and start separating out information into
the various sections that will be pulled out later.

WIP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169061 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-30 23:59:06 +00:00
Chad Rosier
89d86118c5 test/CodeGen/PowerPC/vec_mul.ll: Add a triple. Thanks, Hal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169026 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-30 19:15:10 +00:00
Sebastian Pop
cb4953089b Codegen failure for vmull with small vectors
Codegen was failing with an assertion because of unexpected vector
operands when legalizing the selection DAG for a MUL instruction.

The asserting code was legalizing multiplies for vectors of size 128
bits. It uses a custom lowering to try and detect cases where it can
use a VMULL instruction instead of a VMOVL + VMUL.  The code was
looking for input operands to the MUL that had been sign or zero
extended. If it found the extended operands it would drop the
sign/zero extension and use the original vector size as input to a
VMULL instruction.

The code assumed that the original input vector was 64 bits so that
after dropping the extension it would fit directly into a D register
and could be used as an operand of a VMULL instruction. The input
code that trigger the failure used a vector of <4 x i8> that was
sign extended to <4 x i32>. It was not safe to drop the sign
extension in this case because the original vector is only 32 bits
wide. The fix is to insert a sign extension for the vector to reach
the required 64 bit size. In this particular example, the vector would
need to be sign extented to a <4 x i16>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169024 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-30 19:08:04 +00:00
Chad Rosier
75cbb00727 test/CodeGen/PowerPC/vec_mul.ll: Fix register operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169020 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-30 18:29:01 +00:00
NAKAMURA Takumi
09af5b8c3e test/CodeGen/PowerPC: Add explicit -march=ppc32.
FIXME: Please add another RUN line if you would like to check also on ppc64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168999 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-30 13:28:31 +00:00
Adhemerval Zanella
375cbe4143 This patch fixes the Altivec addend construction for the fused multiply-add
instruction (vmaddfp) to conform with IEEE to ensure the sign of a zero
result when resulting product is -0.0.

The -0.0 vector addend to vmaddfp is generated by a creating a vector
with full bits sets and then shifting each elements by 31-bits to the
left, resulting in a vector of 0x80000000 (or -0.0 as float).

The 'buildvec_canonicalize.ll' was adjusted to reflect this change and
the 'vec_mul.ll' was complemented with the float vector multiplication
test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168998 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-30 13:05:44 +00:00
Evgeniy Stepanov
98c63d0e1c [msan] Tests for vector manipulation instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168997 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-30 12:12:20 +00:00
Evan Cheng
40eef5fe36 Fix logic to determine whether to turn a switch into a lookup table. When
the tables cannot fit in registers (i.e. bitmap), do not emit the table
if it's using an illegal type.

rdar://12779436


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168970 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-30 02:02:42 +00:00
Preston Briggs
a4eff77e37 Modified dump() to provide a little
more information for dependences between
instructions that don't share a common loop.

Updated the test results appropriately.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168965 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-30 00:44:47 +00:00
Kevin Enderby
1c83093cd5 Fixed the arm disassembly of invalid BFI instructions to not build a bad MCInst
which would then cause an assert when printed.  rdar://11437956


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168960 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 23:47:11 +00:00
Eli Bendersky
e8832680f8 Add a FileCheck test that makes sure two different CHECKs won't match the
same string


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168942 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 21:24:44 +00:00
Shuxin Yang
84fca61ca5 rdar://12100355 (part 1)
This revision attempts to recognize following population-count pattern:

 while(a) { c++; ... ; a &= a - 1; ... },
  where <c> and <a>could be used multiple times in the loop body.

 TODO: On X8664 and ARM, __buildin_ctpop() are not expanded to a efficent 
instruction sequence, which need to be improved in the following commits.

Reviewed by Nadav, really appreciate!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168931 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 19:38:54 +00:00
Bill Wendling
7360116048 Handle the situation where CodeGenPrepare removes a reference to a BB that has
the last invoke instruction in the function. This also removes the last landing
pad in an function. This is fine, but with SjLj EH code, we've already placed a
bunch of code in the 'entry' block, which expects the landing pad to stick
around.

When we get to the situation where CGP has removed the last landing pad, go
ahead and nuke the SjLj instructions from the 'entry' block.
<rdar://problem/12721258>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168930 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 19:38:06 +00:00
Meador Inge
aa8cccf129 instcombine: Migrate puts optimizations
This patch migrates the puts optimizations from the simplify-libcalls
pass into the instcombine library call simplifier.

All the simplifiers from simplify-libcalls have now been migrated to
instcombine.  Yay!  Just a few other bits to migrate (prototype attribute
inference and a few statistics) and simplify-libcalls can finally be put
to rest.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168925 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 19:15:17 +00:00
Benjamin Kramer
7d4253af16 Follow up to 168711: It's safe to base this analysis on the found compare, just return the value for the right predicate.
Thanks to Andy for catching this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168921 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 19:07:57 +00:00
Shuxin Yang
07149b7797 fix a typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168909 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 18:09:37 +00:00
Meador Inge
5c5e230ac7 instcombine: Migrate fputs optimizations
This patch migrates the fputs optimizations from the simplify-libcalls
pass into the instcombine library call simplifier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168893 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 15:45:43 +00:00
Meador Inge
c2e331275b instcombine: Migrate fwrite optimizations
This patch migrates the fwrite optimizations from the simplify-libcalls
pass into the instcombine library call simplifier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168892 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 15:45:39 +00:00
Meador Inge
28d52913ab instcombine: Migrate fprintf optimizations
This patch migrates the fprintf optimizations from the simplify-libcalls
pass into the instcombine library call simplifier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168891 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 15:45:33 +00:00
Silviu Baranga
35b3df6e31 Added atomic 64 min/max/umin/umax instrinsics support in the ARM backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168886 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 14:41:25 +00:00
Justin Holewinski
7f128ea00c Teach the legalizer how to handle operands for VSELECT nodes
If we need to split the operand of a VSELECT, it must be the mask operand. We
split the entire VSELECT operand with EXTRACT_SUBVECTOR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168883 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 14:26:28 +00:00
Justin Holewinski
3d200255d5 Allow targets to prefer TypeSplitVector over TypePromoteInteger when computing the legalization method for vectors
For some targets, it is desirable to prefer scalarizing <N x i1> instead of promoting to a larger legal type, such as <N x i32>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168882 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 14:26:24 +00:00
Evgeniy Stepanov
84af05e1ba [msan] Propagate shadow through (x<0) and (x>=0) comparisons.
This is a special case of signed relational comparison where result
only depends on the sign of x.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168881 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 14:25:47 +00:00
Evgeniy Stepanov
3a10b49781 [msan] Fix shadow & origin store & load alignment.
This change ensures that shadow memory accesses have the same alignment
as corresponding app memory accesses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168880 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 14:05:53 +00:00
Evgeniy Stepanov
323c3acf51 [msan] Add a test for r168873.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168877 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 13:11:09 +00:00
Evgeniy Stepanov
f29865d9bb [msan] Update tests (broken in r168873).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168874 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 12:43:56 +00:00
Evgeniy Stepanov
aa4f97d6ed Initial commit of MemorySanitizer.
Compiler pass only.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168866 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 09:57:20 +00:00
Kostya Serebryany
5085eb80ab [asan] when checking the noreturn attribute on the call, also check it on the callee
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168861 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 08:57:20 +00:00
Shuxin Yang
9b7f6f2de8 Instruction::isAssociative() returns true for fmul/fadd if they are tagged "unsafe" mode.
Approved by: Eli and Michael.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168848 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 01:47:31 +00:00
Jakob Stoklund Olesen
89bea17af2 Avoid rewriting instructions twice.
This could cause miscompilations in targets where sub-register
composition is not always idempotent (ARM).

<rdar://problem/12758887>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168837 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 00:26:11 +00:00
Nadav Rotem
90e11dc8ad When combining consecutive stores allow loads in between the stores, if the loads do not alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168832 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29 00:00:08 +00:00
Benjamin Kramer
350c00843b ARM: Implement CanLowerReturn so large vectors get expanded into sret.
Fixes 14337.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168809 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28 20:55:10 +00:00
Ulrich Weigand
781dfbd482 Fix initial frame state on powerpc64.
The createPPCMCAsmInfo routine used PPC::R1 as the initial frame
pointer register, but on PPC64 the 32-bit R1 register does not
have a corresponding DWARF number, causing invalid CIE initial
frame state to be emitted.  Fix by using PPC::X1 instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168799 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28 18:21:03 +00:00
Patrik Hägglund
37d5be777c Add error handling in getInt.
Accordingly, update a testcase with a broken datalayout string.

Also, we never parse negative numbers, because '-' is used as a
separator. Therefore, use unsigned as result type.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168785 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28 12:13:12 +00:00
Kostya Serebryany
1416edc30a [asan] Split AddressSanitizer into two passes (FunctionPass, ModulePass), LLVM part. This requires a clang part which will follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168781 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28 10:31:36 +00:00
Andrew Trick
8b1496c922 misched: Analysis that partitions the DAG into subtrees.
This is a simple, cheap infrastructure for analyzing the shape of a
DAG. It recognizes uniform DAGs that take the shape of bottom-up
subtrees, such as the included matrix multiplication example. This is
useful for heuristics that balance register pressure with ILP. Two
canonical expressions of the heuristic are implemented in scheduling
modes: -misched-ilpmin and -misched-ilpmax.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168773 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28 05:13:28 +00:00
Andrew Trick
8f82a08673 misched: better alias analysis.
This fixes a hole in the "cheap" alias analysis logic implemented within
the DAG builder itself, regardless of whether proper alias analysis is
enabled. It now handles this pattern produced by LSR+CodeGenPrepare.

%sunkaddr1 = ptrtoint * %obj to i64
%sunkaddr2 = add i64 %sunkaddr1, %lsr.iv
%sunkaddr3 = inttoptr i64 %sunkaddr2 to i32*
store i32 %v, i32* %sunkaddr3

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168768 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28 03:42:49 +00:00
Hal Finkel
430b9079c6 BBVectorize: Correctly merge SubclassOptionalData
When two instructions are combined into a vector instruction,
the resulting instruction must have the most-conservative flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168765 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28 03:04:10 +00:00
Bill Schmidt
daa65f5e08 This patch makes medium code model the default for 64-bit PowerPC ELF.
When the CodeGenInfo is to be created for the PPC64 target machine,
a default code-model selection is converted to CodeModel::Medium
provided we are not targeting the Darwin OS.  Defaults for Darwin
are unaffected.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168747 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 23:36:26 +00:00
Chad Rosier
92a6e532b8 Add -verify-machineinstrs to these fast-isel test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168723 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 20:49:56 +00:00
Preston Briggs
3c1cc3888b Modified depends() to recognize that when all levels are "=" and
there's no possible loo-independent dependence, then there's no
dependence.

Updated all test result appropriately.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168719 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 19:12:26 +00:00
Manman Ren
39834da697 CSE: allow PerformTrivialCoalescing to check copies across basic block
boundaries.

Given the following case:
BB0
  %vreg1<def> = SUBrr %vreg0, %vreg7
  %vreg2<def> = COPY %vreg7
BB1
  %vreg10<def> = SUBrr %vreg0, %vreg2
We should be able to CSE between SUBrr in BB0 and SUBrr in BB1.

rdar://12462006


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168717 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 18:58:41 +00:00
Meador Inge
a241b58f8d instcombine: Don't replace all uses for instructions with no uses
My commit to migrate the printf simplifiers from the simplify-libcalls
in r168604 introduced a regression reported by Duncan [1].  The problem
is that in some cases the library call simplifier can return a new value
that has no uses and the new value's type is different than the old value's
type (which is fine because there are no uses).  The specific case that
triggered the bug looked something like:

   declare void @printf(i8*, ...)
   ...
   call void (i8*, ...)* @printf(i8* %fmt)

Which we want to optimized into:

   call i32 @putchar(i32 104)

However, the code was attempting to replace all uses of the printf with
the putchar and the types differ, hence a crash.  This is fixed by *just*
deleting the original instruction when there are no uses.  The old
simplify-libcalls pass is already doing something similar.

[1] http://lists.cs.uiuc.edu/pipermail/llvmdev/2012-November/056338.html

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168716 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 18:52:49 +00:00
Benjamin Kramer
b2a818f83b SCEV: Even if the latch terminator is foldable we can't deduce the result of an unrelated condition with it.
Fixes PR14432.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168711 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 18:16:32 +00:00
Manman Ren
f365d3984e X86: do not fold load instructions such as [V]MOVS[S|D] to other instructions
when the destination register is wider than the memory load.

These load instructions load from m32 or m64 and set the upper bits to zero,
while the folded instructions may accept m128.

rdar://12721174


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168710 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 18:09:26 +00:00
Bill Schmidt
34a9d4b3b9 This patch implements medium code model support for 64-bit PowerPC.
The default for 64-bit PowerPC is small code model, in which TOC entries
must be addressable using a 16-bit offset from the TOC pointer.  Additionally,
only TOC entries are addressed via the TOC pointer.

With medium code model, TOC entries and data sections can all be addressed
via the TOC pointer using a 32-bit offset.  Cooperation with the linker
allows 16-bit offsets to be used when these are sufficient, reducing the
number of extra instructions that need to be executed.  Medium code model
also does not generate explicit TOC entries in ".section toc" for variables
that are wholly internal to the compilation unit.

Consider a load of an external 4-byte integer.  With small code model, the
compiler generates:

	ld 3, .LC1@toc(2)
	lwz 4, 0(3)

	.section	.toc,"aw",@progbits
.LC1:
	.tc ei[TC],ei

With medium model, it instead generates:

	addis 3, 2, .LC1@toc@ha
	ld 3, .LC1@toc@l(3)
	lwz 4, 0(3)

	.section	.toc,"aw",@progbits
.LC1:
	.tc ei[TC],ei

Here .LC1@toc@ha is a relocation requesting the upper 16 bits of the
32-bit offset of ei's TOC entry from the TOC base pointer.  Similarly,
.LC1@toc@l is a relocation requesting the lower 16 bits.  Note that if
the linker determines that ei's TOC entry is within a 16-bit offset of
the TOC base pointer, it will replace the "addis" with a "nop", and
replace the "ld" with the identical "ld" instruction from the small
code model example.

Consider next a load of a function-scope static integer.  For small code
model, the compiler generates:

	ld 3, .LC1@toc(2)
	lwz 4, 0(3)

	.section	.toc,"aw",@progbits
.LC1:
	.tc test_fn_static.si[TC],test_fn_static.si
	.type	test_fn_static.si,@object
	.local	test_fn_static.si
	.comm	test_fn_static.si,4,4

For medium code model, the compiler generates:

	addis 3, 2, test_fn_static.si@toc@ha
	addi 3, 3, test_fn_static.si@toc@l
	lwz 4, 0(3)

	.type	test_fn_static.si,@object
	.local	test_fn_static.si
	.comm	test_fn_static.si,4,4

Again, the linker may replace the "addis" with a "nop", calculating only
a 16-bit offset when this is sufficient.

Note that it would be more efficient for the compiler to generate:

	addis 3, 2, test_fn_static.si@toc@ha
        lwz 4, test_fn_static.si@toc@l(3)

The current patch does not perform this optimization yet.  This will be
addressed as a peephole optimization in a later patch.

For the moment, the default code model for 64-bit PowerPC will remain the
small code model.  We plan to eventually change the default to medium code
model, which matches current upstream GCC behavior.  Note that the different
code models are ABI-compatible, so code compiled with different models will
be linked and execute correctly.

I've tested the regression suite and the application/benchmark test suite in
two ways:  Once with the patch as submitted here, and once with additional
logic to force medium code model as the default.  The tests all compile
cleanly, with one exception.  The mandel-2 application test fails due to an
unrelated ABI compatibility with passing complex numbers.  It just so happens
that small code model was incredibly lucky, in that temporary values in 
floating-point registers held the expected values needed by the external
library routine that was called incorrectly.  My current thought is to correct
the ABI problems with _Complex before making medium code model the default,
to avoid introducing this "regression."

Here are a few comments on how the patch works, since the selection code
can be difficult to follow:

The existing logic for small code model defines three pseudo-instructions:
LDtoc for most uses, LDtocJTI for jump table addresses, and LDtocCPT for
constant pool addresses.  These are expanded by SelectCodeCommon().  The
pseudo-instruction approach doesn't work for medium code model, because
we need to generate two instructions when we match the same pattern.
Instead, new logic in PPCDAGToDAGISel::Select() intercepts the TOC_ENTRY
node for medium code model, and generates an ADDIStocHA followed by either
a LDtocL or an ADDItocL.  These new node types correspond naturally to
the sequences described above.

The addis/ld sequence is generated for the following cases:
 * Jump table addresses
 * Function addresses
 * External global variables
 * Tentative definitions of global variables (common linkage)

The addis/addi sequence is generated for the following cases:
 * Constant pool entries
 * File-scope static global variables
 * Function-scope static variables

Expanding to the two-instruction sequences at select time exposes the
instructions to subsequent optimization, particularly scheduling.

The rest of the processing occurs at assembly time, in
PPCAsmPrinter::EmitInstruction.  Each of the instructions is converted to
a "real" PowerPC instruction.  When a TOC entry needs to be created, this
is done here in the same manner as for the existing LDtoc, LDtocJTI, and
LDtocCPT pseudo-instructions (I factored out a new routine to handle this).

I had originally thought that if a TOC entry was needed for LDtocL or
ADDItocL, it would already have been generated for the previous ADDIStocHA.
However, at higher optimization levels, the ADDIStocHA may appear in a 
different block, which may be assembled textually following the block
containing the LDtocL or ADDItocL.  So it is necessary to include the
possibility of creating a new TOC entry for those two instructions.

Note that for LDtocL, we generate a new form of LD called LDrs.  This
allows specifying the @toc@l relocation for the offset field of the LD
instruction (i.e., the offset is replaced by a SymbolLo relocation).
When the peephole optimization described above is added, we will need
to do similar things for all immediate-form load and store operations.

The seven "mcm-n.ll" test cases are kept separate because otherwise the
intermingling of various TOC entries and so forth makes the tests fragile
and hard to understand.

The above assumes use of an external assembler.  For use of the
integrated assembler, new relocations are added and used by
PPCELFObjectWriter.  Testing is done with "mcm-obj.ll", which tests for
proper generation of the various relocations for the same sequences
tested with the external assembler.






git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168708 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 17:35:46 +00:00
Ulrich Weigand
dba37a3c43 Never use .lcomm on platforms where it does not accept an alignment
argument.  Instead, use a pair of .local and .comm directives.

This avoids spurious differences between binaries built by the
integrated assembler vs. those built by the external assembler,
since the external assembler may impose alignment requirements
on .lcomm symbols where the integrated assembler does not.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168704 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 16:11:16 +00:00
Meador Inge
76f8eda284 Move sprintf simplifier tests to test/Transforms/InstCombine
The tests from SPrintF.ll should have been migrated to sprintf-1.ll in
r168677, but I forgot to do it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168702 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 15:35:58 +00:00
Bill Wendling
efd08d413c Remove the dependent libraries feature.
The dependent libraries feature was never used and has bit-rotted. Remove it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168694 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 09:55:56 +00:00
NAKAMURA Takumi
1db3152dde llvm/test/Transforms/SimplifyLibCalls: FileCheck-ize 3 tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168691 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 08:18:23 +00:00
NAKAMURA Takumi
f5cec289de llvm/test/Transforms/SimplifyLibCalls/SPrintF.ll: Handle @sprintf() with -instcombine, not -simplify-libcalls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168690 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 08:18:15 +00:00
NAKAMURA Takumi
7b39e3dbf8 llvm/test/Transforms/SimplifyLibCalls/SPrintF.ll: Fix datalayout since r168516.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168689 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 08:18:08 +00:00
NAKAMURA Takumi
9c5c2e6d09 Trailing linefeeds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168688 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 08:17:58 +00:00
Craig Topper
020669d53f Revert accidental commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168687 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 08:17:04 +00:00
Craig Topper
af87dae12c Make PrintReg constructor explicit to prevent weird implicit conversions from accidentally being triggered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168686 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 08:14:24 +00:00
Dmitry Vyukov
b10675ef14 tsan: instrument atomic nand operation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168684 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 08:09:25 +00:00
Craig Topper
2cf4fb4884 Add test cases for r168417.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168681 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 07:19:54 +00:00
NAKAMURA Takumi
ff9ca8c081 test/Transforms/SimplifyLibCalls/SPrintF.ll: Suppress this for now. r168677 unveiled another failure.
FYI, this test makes no sense with "not grep"... I saw "assertion failure" in stderr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168679 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 06:42:48 +00:00
Preston Briggs
6ee74f52e9 Modify depends(Src, Dst, PossiblyLoopIndependent).
If the Src and Dst are the same instruction,
no loop-independent dependence is possible,
so we force the PossiblyLoopIndependent flag to false.

The test case results are updated appropriately.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168678 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 06:41:46 +00:00
Meador Inge
69ea027e04 instcombine: Migrate sprintf optimizations
This patch migrates the sprintf optimizations from the simplify-libcalls
pass into the instcombine library call simplifier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168677 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 05:57:54 +00:00
Eric Christopher
eb6363adf0 The section is .debug_line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168666 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 01:40:36 +00:00
Chad Rosier
277068fe40 Extend test case for r168657.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168658 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 01:10:48 +00:00
Michael Ilseman
bc43fe1efe Fast-math test for SimplifyInstruction: fold multiply by 0
Applied the patch, rather than committing it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168656 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 01:00:22 +00:00
NAKAMURA Takumi
cb84142195 llvm/test/CodeGen/X86/2012-07-15-broadcastfold.ll: Loosen expression corresponding to r168627. Win32 and *bsd were affected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168651 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 00:48:27 +00:00
Michael Ilseman
a52f3ae45c Fast-math test case for bitcode and textual reading/writing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168647 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27 00:45:08 +00:00
Eli Bendersky
527ba9c88d Make this test less sensitive.
It currently assumes register numbering and any harmless change in the X86
register naming makes it fail. It's enough to match the register names.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168632 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-26 23:27:09 +00:00
Eli Friedman
0c617e6026 Get rid of the getPointeeAlignment helper function from
InstCombineLoadStoreAlloca.cpp, which had many issues.
(At least two bugs were noted on llvm-commits, and it was overly conservative.)
Instead, use getOrEnforceKnownAlignment.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168629 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-26 23:04:53 +00:00
Chad Rosier
1243922fc1 Remove the X86 Maximal Stack Alignment Check pass as it is no longer necessary.
This pass was conservative in that it always reserved the FP to enable dynamic
stack realignment, which allowed the RA to use aligned spills for vector
registers.  This happens even when spills were not necessary.  The RA has 
since been improved to use unaligned spills when necessary.

The new behavior is to realign the stack if the frame pointer was already
reserved for some other reason, but don't reserve the frame pointer just
because a function contains vector virtual registers.

Part of rdar://12719844

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168627 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-26 22:55:05 +00:00
Shuxin Yang
b30e256993 rdar://12329730 (defect 2)
Enhancement to InstCombine. Try to catch this opportunity:
  
 ---------------------------------------------------------------
 ((X^C1) >> C2) ^ C3  => (X>>C2) ^ ((C1>>C2)^C3)
  where the subexpression "X ^ C1" has more than one uses, and
  "(X^C1) >> C2" has single use. 
 ---------------------------------------------------------------- 

 Reviewed by Nadav (with minor change per his request).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168615 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-26 21:44:25 +00:00
Meador Inge
d7aa3231f7 instcombine: Migrate printf optimizations
This patch migrates the printf optimizations from the simplify-libcalls
pass into the instcombine library call simplifier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168604 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-26 20:37:20 +00:00
Jakub Staszak
d642baf4be Normalize splat 256bit vectors with 8 elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168600 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-26 19:24:31 +00:00
Eli Bendersky
a5cf16fc51 Rewrite test to not use a FileCheck variable and redefine it on the same line.
In preparation for the FileCheck functionality change which will allow using
a variable later on the same line.

No functionality change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168588 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-26 14:09:46 +00:00
Dmitry Vyukov
6702e53926 [tsan] add fail order to compare_exchange
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168586 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-26 11:36:19 +00:00
Meador Inge
38c4441797 instcombine: Migrate toascii optimizations
This patch migrates the toascii optimizations from the simplify-libcalls
pass into the instcombine library call simplifier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168580 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-26 03:38:52 +00:00
Meador Inge
017bb750ab instcombine: Migrate isascii optimizations
This patch migrates the isascii optimizations from the simplify-libcalls
pass into the instcombine library call simplifier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168579 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-26 03:10:07 +00:00
Meador Inge
a0798ec377 instcombine: Migrate isdigit optimizations
This patch migrates the isdigit optimizations from the simplify-libcalls
pass into the instcombine library call simplifier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168578 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-26 02:31:59 +00:00
Meador Inge
48bb786b13 Fix bogus comment; no functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168575 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-26 00:25:33 +00:00
Meador Inge
dfb3b1a779 instcombine: Migrate *abs optimizations
This patch migrates the *abs optimizations from the simplify-libcalls
pass into the instcombine library call simplifier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168574 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-26 00:24:07 +00:00
Meador Inge
15d099a790 instcombine: Migrate ffs* optimizations
This patch migrates the ffs* optimizations from the simplify-libcalls
pass into the instcombine library call simplifier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168571 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-25 20:45:27 +00:00
Rafael Espindola
f4f14f68f6 Add support for .cfi_register now that it is easy to extent the representation
to support it. Original patch with the parsing and plumbing by the PaX team and
Roman Divacky. I added the bits in MCDwarf.cpp and the test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168565 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-25 15:14:49 +00:00
Nadav Rotem
0af63ac245 Add support for pointer induction variables even when there is no integer induction variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168558 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-25 08:41:35 +00:00
Benjamin Kramer
915558e775 PPC: MCize most of the darwin PIC emission.
The last remaining bit is "bcl 20, 31, AnonSymbol", which I couldn't find the
instruction definition for. Only whitespace changes in assembly output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168541 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-24 13:18:25 +00:00
Rafael Espindola
c8fec7e21f Implement .cfi_undefined. Based on a patch from PaX team, updated by
Roman Divacky. I just added the testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168520 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-23 16:59:41 +00:00
Patrik Hägglund
834518f1ce Disallow the undocumented practice of starting the datalayout string with '-'.
Update some test cases accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168516 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-23 14:51:42 +00:00
Meador Inge
6098c6b56b Add more functions to the target library information.
I discovered a few more missing functions while migrating optimizations
from the simplify-libcalls pass to the instcombine (I already added some
in r167659).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168501 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-22 15:36:42 +00:00
Preston Briggs
72a2c0622a Corrects a problem where we reply exclusively of GEPs to drive
analysis.  Better is to look for cases with useful GEPs and use them
when possible.  When a pair of useful GEPs is not available, use the
raw SCEVs directly. This approach supports better analysis of pointer
dereferencing.

In parallel, all the test cases are updated appropriately.
Cases where we have a store to *B++ can now be analyzed!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168474 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-21 23:50:04 +00:00
Jack Carter
198ad916d7 Mips direct object xgot support
This patch provides support for the MIPS relocations:

    *)  R_MIPS_GOT_HI16
    *)  R_MIPS_GOT_LO16
    *)  R_MIPS_CALL_HI16
    *)  R_MIPS_CALL_LO16

These are used for large GOT instruction sequences.

Contributer: Jack Carter


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168471 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-21 23:38:59 +00:00
Akira Hatanaka
f09a03776d [mips] Generate big GOT code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168460 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-21 20:40:38 +00:00
Andrew Kaylor
238f34a706 Adding tests for the Intel JIT event listener's MCJIT support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168459 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-21 20:38:26 +00:00
Anton Korobeynikov
0ae6124034 Add support for varargs functions for msp430.
Patch by Job Noorman!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168440 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-21 17:28:27 +00:00
Anton Korobeynikov
6cbeb4d839 Add support for byval args. Patch by Job Noorman!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168439 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-21 17:23:03 +00:00
NAKAMURA Takumi
4bf4c738e8 llvm/test/Transforms/InstCombine/sdiv-1.ll: FileCheck-ize.
"not grep '-715827882'" performed as below...bad...

Usage: grep [OPTION]... PATTERN [FILE]...
Try `grep --help' for more information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168430 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-21 14:46:18 +00:00
Rafael Espindola
811a837609 Using "not grep" is brittle as the test passes if llvm-as fails.
Fix the testcase to be valid IL and uses FileCheck.
Thanks to NAKAMURA Takumi for noticing it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168427 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-21 14:17:23 +00:00
Chandler Carruth
07df765e65 PR14055: Implement support for sub-vector operations in SROA.
Now if we can transform an alloca into a single vector value, but it has
subvector, non-element accesses, we form the appropriate shufflevectors
to allow SROA to proceed. This fixes PR14055 which pointed out a very
common pattern that SROA couldn't handle -- mixed vec3 and vec4
operations on a single alloca.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168418 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-21 08:16:30 +00:00
Eli Bendersky
a631ea96e6 Add a tests for the new -no-show-raw-insn option of llvm-objdump.
This also initiates a test/tools directory where tools-specific tests can be
placed.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168397 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-20 23:44:22 +00:00
Kostya Serebryany
407790604b [asan] don't instrument linker-initialized globals even with external linkage in -asan-initialization-order mode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168367 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-20 13:11:32 +00:00
Kostya Serebryany
ca23d43084 [asan] make sure that linker-initialized globals (non-extern) are not instrumented even in -asan-initialization-order mode. This time with a test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168366 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-20 13:00:01 +00:00
NAKAMURA Takumi
fecc368beb llvm/test/ExecutionEngine/MCJIT/lit.local.cfg: ppc32-elf is not ready.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168364 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-20 10:49:01 +00:00
Chandler Carruth
176792990e Fix PR14132 and handle OOB loads speculated throuh PHI nodes.
The issue is that we may end up with newly OOB loads when speculating
a load into the predecessors of a PHI node, and this confuses the new
integer splitting logic in some cases, triggering an assertion failure.
In fact, the branch in question must be dead code as it loads from
a too-narrow alloca. Add code to handle this gracefully and leave the
requisite FIXMEs for both optimizing more aggressively and doing more to
aid sanitizing invalid code which triggers these patterns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168361 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-20 10:02:19 +00:00
Tim Northover
310f248c22 Fix physical register liveness calculations:
+ Take account of clobbers
+ Give outputs priority over inputs since they happen later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168360 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-20 09:56:11 +00:00
Elena Demikhovsky
4fe5405bdd Intel OCL built-ins calling conventions now support MacOS 32-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168359 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-20 09:37:57 +00:00
Simon Atanasyan
01425d639e Marking remote mcjit tests as XFAIL for MIPS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168357 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-20 07:25:17 +00:00
Chandler Carruth
f5837aacd4 Rework the rewriting of loads and stores for vector and integer allocas
to properly handle the combinations of these with split integer loads
and stores. This essentially replaces Evan's r168227 by refactoring the
code in a different way, and trynig to mirror that refactoring in both
the load and store sides of the rewriting.

Generally speaking there was some really problematic duplicated code
here that led to poorly founded assumptions and then subtle bugs. Now
much of the code actually flows through and follows a more consistent
style and logical path. There is still a tiny bit of duplication on the
store side of things, but it is much less bad.

This also changes the logic to never re-use a load or store instruction
as that was simply too error prone in practice.

I've added a few tests (one a reduction of the one in Evan's original
patch, which happened to be the same as the report in PR14349). I'm
going to look at adding a few more tests for things I found and fixed in
passing (such as the volatile tests in the vectorizable predicate).

This patch has survived bootstrap, and modulo one bugfix survived
Duncan's test suite, but let me know if anything else explodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168346 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-20 01:12:50 +00:00
Anton Korobeynikov
2386fc8daa Factor out type info emission into separate routine.
It turned out that ARM wants different layout of type infos.
This is yet another patch in attempt to fix PR7187 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168325 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-19 21:06:26 +00:00
Jakob Stoklund Olesen
e42561ad0c Handle mixed normal and early-clobber defs on inline asm.
PR14376.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168320 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-19 19:31:10 +00:00
Ulrich Weigand
948d9f743e Enable MCJIT tests on PowerPC.
Disable old JIT tests on PowerPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168316 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-19 17:57:07 +00:00
Duncan Sands
b8e1111fbf Fix PR14060, an infinite loop in reassociate. The problem was that one of the
operands of the expression being written was wrongly thought to be reusable as
an inner node of the expression resulting in it turning up as both an inner node
*and* a leaf, creating a cycle in the def-use graph.  This would have caused the
verifier to blow up if things had gotten that far, however it managed to provoke
an infinite loop first.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168291 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-18 19:27:01 +00:00
Andrew Trick
410fe6fe19 Use a full triple for a PPC test case for asm syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168283 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-18 06:21:03 +00:00
NAKAMURA Takumi
fad9751d6e MCJIT: [cygming] Give noop to __main also in RecordingMemoryManger. It is emitted in @main().
XFAIL(s) can be removed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168282 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-18 06:16:32 +00:00
NAKAMURA Takumi
64b5015900 test/ExecutionEngine/MCJIT/stubs-remote.ll: Prune DOSish CRLF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168281 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-18 06:16:21 +00:00
Nick Lewycky
294c965146 Don't try to calculate the alignment of an unsigned type. Fixes PR14371!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168280 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-18 05:39:39 +00:00
Andrew Trick
953663a9aa Silence the buildbots for this test while I figure out the triple
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168249 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-17 03:39:26 +00:00
Andrew Trick
e1f663933a Broaden isSchedulingBoundary to check aliases of SP.
On PPC the stack pointer is X1, but ADJCALLSTACK writes R1.

Fixes PR14315: Register regmask dependency problem with misched.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168248 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-17 03:35:11 +00:00
Hal Finkel
c37f502d48 Phi speculation improvement for BasicAA
This is a partial solution to PR14351. It removes some of the special
significance of the first incoming phi value in the phi aliasing checking logic
in BasicAA. In the context of a loop, the old logic assumes that the first
incoming value is the interesting one (meaning that it is the one that comes
from outside the loop), but this is often not the case.  With this change, we
now test first the incoming value that comes from a block other than the parent
of the phi being tested.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168245 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-17 02:33:15 +00:00
Eli Friedman
43147afd71 Mark FP_EXTEND form v2f32 to v2f64 as "expand" for ARM NEON. Patch by Pete Couperus.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168240 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-17 01:52:46 +00:00
Chad Rosier
0a63b6ac79 [fast-isel] Add the -verify-machineinstrs to these test cases. The remaining
test cases require fixes to fast-isel before the verifier can be enabled.
Part of rdar://12594152

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168233 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-17 00:42:06 +00:00
Nadav Rotem
9a6823516f LoopVectorizer: Add initial support for pointer induction variables (for example: *dst++ = *src++).
At the moment we still require to have an integer induction variable (for example: i++).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168231 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-17 00:27:03 +00:00
Akira Hatanaka
94e472832f Initial implementation of MipsTargetLowering::isLegalAddressingMode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168230 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-17 00:25:41 +00:00
Evan Cheng
fd22019ec3 Teach SROA rewriteVectorizedStoreInst to handle cases when the loaded value is narrower than the stored value. rdar://12713675
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168227 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-17 00:05:06 +00:00
Andrew Kaylor
784c5bb8b5 Marking remote mcjit tests as XFAIL for cygwin (hopefully only temporarily).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168226 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-17 00:02:50 +00:00
Andrew Kaylor
21414e953a Marking remote mcjit tests as XFAIL for mingw32 (hopefully only temporarily).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168221 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-16 23:38:16 +00:00
Andrew Kaylor
3bae2696ff Marking remote mcjit tests as XFAIL for ARM (hopefully only temporarily).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168210 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-16 22:21:04 +00:00
Weiming Zhao
e56764bad1 Remove hard coded registers in ARM ldrexd and strexd instructions
This patch replaces the hard coded GPR pair [R0, R1] of
Intrinsic:arm_ldrexd and [R2, R3] of Intrinsic:arm_strexd with
even/odd GPRPair reg class.
Similar to the lowering of atomic_64 operation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168207 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-16 21:55:34 +00:00
Anton Korobeynikov
b1a392e7c5 Make sure FABS on v2f32 and v4f32 is legal on ARM NEON
This fixes PR14359


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168200 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-16 21:15:20 +00:00
Richard Osborne
ccc015d431 Fix handling of aliases to functions.
An alias to a function should use pc relative addressing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168199 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-16 21:12:38 +00:00
Justin Holewinski
2085d00d09 [NVPTX] Order global variables in def-use order before emiting them in the final assembly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168198 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-16 21:03:51 +00:00
Justin Holewinski
eaff2d55a9 Preserve address space of forward-referenced global variables in the LL parser
Before, the parser would assert on the following code:

@a2 = global i8 addrspace(1)* @a
@a = addrspace(1) global i8 0

because the type of @a was "i8*" instead of "i8 addrspace(1)*" when parsing
the initializer for @a2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168197 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-16 21:03:47 +00:00
Hemant Kulkarni
2217577fa7 Added program header emission
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168195 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-16 20:51:32 +00:00
Duncan Sands
aceb03eb58 InstructionSimplify should be able to simplify A+B==B+A to 'true'
but wasn't due to the same logic bug that caused PR14361.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168186 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-16 19:41:26 +00:00
Duncan Sands
afe4539f8e Fix PR14361: wrong simplification of A+B==B+A. You may think that the old logic
replaced by this patch is equivalent to the new logic, but you'd be wrong, and
that's exactly where the bug was.  There's a similar bug in instsimplify which
manifests itself as instsimplify failing to simplify this, rather than doing it
wrong, see next commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168181 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-16 18:55:49 +00:00
Andrew Kaylor
661dfdc9b7 Adding new tests to test lli's pseudo-remote feature (-remote-mcjit).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168180 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-16 18:51:59 +00:00
NAKAMURA Takumi
e0827d8880 llvm/test/CodeGen/X86/hipe-cc*.ll: Add explicit -mcpu, or they don't expect to pass on Atom.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168171 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-16 16:07:37 +00:00
Duncan Sands
dc7f174b5e Add the Erlang/HiPE calling convention, patch by Yiannis Tsiouris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168166 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-16 12:36:39 +00:00
Amara Emerson
4372f00373 Add MCJIT test case for running global constructors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168149 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-16 11:17:00 +00:00
Hans Wennborg
fbeb956876 Constant::IsThreadDependent(): Use dyn_cast<Constant> instead of cast
It turns out that the operands of a Constant are not always themselves
Constant. For example, one of the operands of BlockAddress is
BasicBlock, which is not a Constant.

This should fix the dragonegg-x86_64-linux-gcc-4.6-test build which
broke in r168037.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168147 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-16 10:33:25 +00:00
Craig Topper
d577552c66 Use roundps/pd for llvm.ceil, llvm.trunc, llvm.rint, and llvm.nearbyint of vector types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168141 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-16 06:37:56 +00:00
Akira Hatanaka
a032dbd62f [mips] Fix delay slot filler so that instructions with register operand $1 are
allowed in branch delay slot.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-16 02:39:34 +00:00
Eli Bendersky
085f982462 Add some tests for the FileCheck utility.
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20121112/156007.html



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168113 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-15 23:42:51 +00:00
Eli Friedman
846ce8ea67 Mark FP_ROUND for converting NEON v2f64 to v2f32 as expand. Add a missing
case to vector legalization so this actually works.

Patch by Pete Couperus.  Fixes PR12540.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168107 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-15 22:44:27 +00:00
Adhemerval Zanella
e95ed2b7af PowerPC: Lowering floor intrinsic for Altivec
This patch lowers the llvm.floor, llvm.ceil, llvm.trunc, and
llvm.nearbyint to Altivec instruction when using 4 single-precision
float vectors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168086 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-15 20:56:03 +00:00
Hans Wennborg
1839858983 Make GlobalOpt be conservative with TLS variables (PR14309)
For global variables that get the same value stored into them
everywhere, GlobalOpt will replace them with a constant. The problem is
that a thread-local GlobalVariable looks like one value (the address of
the TLS var), but is different between threads.

This patch introduces Constant::isThreadDependent() which returns true
for thread-local variables and constants which depend on them (e.g. a GEP
into a thread-local array), and teaches GlobalOpt not to track such
values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168037 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-15 11:40:00 +00:00
Duncan Sands
7ecfcc1639 Fix a crash observed by Shuxin Yang. The issue here is that LinearizeExprTree,
the utility for extracting a chain of operations from the IR, thought that it
might as well combine any constants it came across (rather than just returning
them along with everything else).  On the other hand, the factorization code
would like to see the individual constants (this is quite reasonable: it is
much easier to pull a factor of 3 out of 2*3 than it is to pull it out of 6;
you may think 6/3 isn't so hard, but due to overflow it's not as easy to undo
multiplications of constants as it may at first appear).  This patch therefore
makes LinearizeExprTree stupider: it now leaves optimizing to the optimization
part of reassociate, and sticks to just analysing the IR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168035 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-15 09:58:38 +00:00
Bill Schmidt
527388dea5 This patch is in preparation for adding medium code model support to the
PPC64 target.  The five tests modified herein test code generation that is
sensitive to the code model selected.  So I've added -code-model=small to
the RUN commands for each.

Since small code model is the default, this has no effect for now; but this
prepares us for eventually changing the default to medium code model for PPC64.

Test changes verified with small and medium code model as default on
powerpc64-unknown-linux-gnu.  All tests continue to pass.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167999 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 23:23:27 +00:00
Jakub Staszak
0e52f46e48 Make sure to not get AVX code on an AVX-capable host. Revealed in r167967.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167989 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 22:24:01 +00:00
NAKAMURA Takumi
d0a4a4bf5c test/CodeGen/Hexagon/postinc-load.ll: Suppress it for now. It triggered the failure on i686 hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167988 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 22:22:37 +00:00
Eric Christopher
06b423452c Remove the CellSPU port.
Approved by Chris Lattner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167984 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 22:09:20 +00:00
NAKAMURA Takumi
9292136787 llvm/test/CodeGen/X86/memset.ll: FileCheck-ize, and add another case on +avx.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167975 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 21:01:40 +00:00
Jyotsna Verma
cb02fa9d7f Added multiclass for post-increment load instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167974 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 20:38:48 +00:00
Benjamin Kramer
7c6e8cd7cc Force CPU in test so we don't accidentally get AVX code on an AVX-capable host.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167973 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 20:31:42 +00:00
Jakub Staszak
de7c8530c8 Remove DOS line endings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167968 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 20:18:34 +00:00
Benjamin Kramer
2dbe929685 X86: Enable SSE memory intrinsics even when stack alignment is less than 16 bytes.
The stack realignment code was fixed to work when there is stack realignment and
a dynamic alloca is present so this shouldn't cause correctness issues anymore.

Note that this also enables generation of AVX instructions for memset
under the assumptions:
- Unaligned loads/stores are always fast on CPUs supporting AVX
- AVX is not slower than SSE
We may need some tweaked heuristics if one of those assumptions turns out not to
be true.

Effectively reverts r58317. Part of PR2962.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167967 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 20:08:40 +00:00
Nadav Rotem
50b66387e3 The code pattern "imm0_255_neg" is used for checking if an immediate value is a small negative number.
This patch changes the definition of negative from -0..-255 to -1..-255. I am changing this because of
a bug that we had in some of the patterns that assumed that "subs" of zero does not set the carry flag.

rdar://12028498



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167963 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 19:39:15 +00:00
Justin Holewinski
a20067b5d4 [NVPTX] Implement custom lowering of loads/stores for i1
Loads from i1 become loads from i8 followed by trunc
Stores to i1 become zext to i8 followed by store to i8

Fixes PR13291

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167948 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 19:19:16 +00:00
Anton Korobeynikov
062a6c8380 Fix really stupid ARM EHABI info generation bug: we should not emit
eh table and handler data if there are no landing pads in the function.
Patch by Logan Chien with some cleanups from me.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167945 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 19:13:30 +00:00
Jim Grosbach
3ca6382120 X86: Better diagnostics for 32-bit vs. 64-bit mode mismatches.
When an instruction as written requires 32-bit mode and we're assembling
in 64-bit mode, or vice-versa, issue a more specific diagnostic about
what's wrong.

rdar://12700702

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167937 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 18:04:47 +00:00
Alexey Samsonov
15ab115df5 Emit relocations from .debug_aranges to .debug_info for asm files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167926 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 09:55:38 +00:00
Rafael Espindola
8e2b8ae3b1 Handle DAG CSE adding new uses during ReplaceAllUsesWith. Fixes PR14333.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167912 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 05:08:56 +00:00
Anton Korobeynikov
25efd6d556 Use TARGET2 relocation for TType references on ARM.
Do some cleanup of the code while here.

Inspired by patch by Logan Chien!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167904 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 01:47:00 +00:00
Eric Christopher
242343d1ab Revert "Use the 'count' attribute instead of the 'upper_bound' attribute."
temporarily as it is breaking the gdb bots.

This reverts commit r167806/e7ff4c14b157746b3e0228d2dce9f70712d1c126.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167886 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 23:30:43 +00:00
Michael J. Spencer
4de5872ded [MC][COFF] Emit weak symbols to the correct section. Patch by Dmitry Puzirev!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167877 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 22:04:09 +00:00
NAKAMURA Takumi
2aac6161e4 Revert r167836, "llvm/test/Other/close-stderr.ll: Mark it as XFAIL:mingw32 for now.", corresponding to r167849.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167876 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 21:57:42 +00:00
Ulrich Weigand
51abc9877e Add test case to verify correct relocs being generated for
TLS symbols on PowerPC using the integrated assembler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167875 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 21:53:43 +00:00
Shankar Easwaran
a8028e5884 numerically sort the symbols, so that the testcase result is uniform
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167872 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 21:01:11 +00:00
Daniel Dunbar
ed074e9a1b llvm-nm: Make sort more stable when symbol names are equal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167866 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 19:39:55 +00:00
Manman Ren
2adc503f29 X86: when constructing VZEXT_LOAD from other loads, makes sure its output
chain is correctly setup.

As an example, if the original load must happen before later stores, we need
to make sure the constructed VZEXT_LOAD is constrained to be before the stores.

rdar://12684358


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167859 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 19:13:05 +00:00
Ulrich Weigand
b64e2115de Do not consider a machine instruction that uses and defines the same
physical register as candidate for common subexpression elimination
in MachineCSE.

This fixes a bug on PowerPC in MultiSource/Applications/oggenc/oggenc
caused by MachineCSE invalidly merging two separate DYNALLOC insns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167855 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 18:40:58 +00:00
Shankar Easwaran
206252cc9f Adding changes to support GNU style archive library reading
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167853 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-13 18:38:42 +00:00