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7678 Commits

Author SHA1 Message Date
Chris Lattner
ccde4cb8ab add support for 128-bit add/sub on ppc64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37158 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 06:52:46 +00:00
Chris Lattner
a066810681 add support for 128-bit integer add/sub 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37154 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 06:35:11 +00:00
Chris Lattner
da66472ea6 Fix PR1427 and test/CodeGen/X86/mmx-shuffle.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37141 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 03:29:42 +00:00
Evan Cheng
d9e9efb253 Remove. Not needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37139 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 00:11:35 +00:00
Evan Cheng
e425956b72 Default implementation of TargetInstrInfo::getBlockSize(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37138 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 23:53:44 +00:00
Evan Cheng
3f8602cf20 ARM::tB is also predicable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37125 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 21:53:43 +00:00
Evan Cheng
02c602b333 PredicateInstruction returns true if the operation was successful. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37124 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 21:53:07 +00:00
Evan Cheng
2eb80fa433 Add default implementation of PredicateInstruction(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37123 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 21:20:37 +00:00
Evan Cheng
75604f81b7 Move if-conversion after all passes that may use register scavenger. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37120 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 20:52:46 +00:00
Evan Cheng
b5f8eff566 Removed isPredicable(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37119 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 20:50:23 +00:00
Evan Cheng
5ada199246 Make ARM::B isPredicable; Make Bcc and MOVCC condition option a normal operand so they are not predicable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37118 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 20:50:01 +00:00
Evan Cheng
064d7cdd3c Added isPredicable bit to class Instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37117 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 20:47:01 +00:00
Evan Cheng
aeafca0a25 Conditional branch is not a barrier. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37103 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 07:45:54 +00:00
Chris Lattner
738a6ec0ae implement the missing maskmovq mmx intrinsic that akor hit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37100 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 06:08:17 +00:00
Evan Cheng
2706f9771d Fix comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37098 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 05:14:06 +00:00
Evan Cheng
9307292ae2 Hooks for predication support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37093 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 02:01:49 +00:00
Chris Lattner
9f5d5783ec fix some subtle inline asm selection issues 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37067 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-15 01:31:05 +00:00
Evan Cheng
44bec52b1b Add PredicateOperand to all ARM instructions that have the condition field. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37066 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-15 01:29:07 +00:00
Chris Lattner
709fd414e2 fix subtle bugs in inline asm operand selection 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37065 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-15 01:28:08 +00:00
Lauro Ramos Venancio
5d3d44a848 Fix previous patch. GOTOFF can be used only when the symbol has internal 
linkage or hidden visibility.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37055 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-14 23:20:21 +00:00
Lauro Ramos Venancio
930d161ba2 Optimize PIC implementation. GOTOFF can be used when the symbol is defined 
and used in the same module.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37044 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-14 18:46:23 +00:00
Lauro Ramos Venancio
69642f11ed Enable aliases on arm-linux. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37042 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-14 18:32:56 +00:00
Chris Lattner
40c1b66d88 Fix PR1413 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37023 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-13 22:19:27 +00:00
Anton Korobeynikov
0ff3ca4f92 More DWARF-related things cleanup: 
1. Fix PR1380
2. Apply Duncan's patch from PR1410
3. Insert workaround for "one personality function per module" as noted in PR1414
4. Emit correct debug frames for x86/linux. This partly fixes DebugInfo/2006-11-06-StackTrace.cpp: stack trace is
shown correctly, but arguments for function on top of stack are displayed incorrectly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37015 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-12 22:36:25 +00:00
Chris Lattner
0f1621bb4c add some notes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36965 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-10 00:08:04 +00:00
Evan Cheng
42d712b306 Switch BCC, MOVCCr, etc. to PredicateOperand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36948 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-08 21:08:43 +00:00
Evan Cheng
f88b3a5698 PredicateOperand can be used as a normal operand for isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36947 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-08 21:06:08 +00:00
Evan Cheng
43182ac0d6 R0 is a sub-register of X0, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36939 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-08 17:03:51 +00:00
Lauro Ramos Venancio
356e72c4f1 Fix PR1390 in a better way. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36916 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-07 23:15:16 +00:00
Evan Cheng
c4e600362e This is no longer needed after enabling the DAG combiner xform. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36909 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-07 21:29:41 +00:00
Chris Lattner
31c2ec3afb add this back 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36892 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-06 20:31:17 +00:00
Anton Korobeynikov
f13090c436 Update MSIL BE. This patch fixes most weird glitches outlined in 
README.txt. Patch by Roman Samoilov!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36890 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-06 20:13:33 +00:00
Bill Wendling
11d8fdaf6a 3DNowA implies 3DNow. 64-bit implies SSE1, SSE2, and I assume MMX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36860 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-06 07:56:19 +00:00
Nate Begeman
9a22530696 Reference correct header 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36834 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-06 04:00:55 +00:00
Lauro Ramos Venancio
8f57667a5d Fix PR1390. 
Don't spill extra register to align the stack.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36814 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-05 23:44:41 +00:00
Chris Lattner
f110a2bdb6 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36811 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-05 22:44:08 +00:00
Chris Lattner
5e14b0d3e6 the mason example is implemented. Move some examples out of llvm/test, 
upgrade the syntax of some other examples.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36806 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-05 22:29:06 +00:00
Chris Lattner
0d75f57f75 implement anyextend from i1 -> i64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36802 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-05 22:17:00 +00:00
Chris Lattner
0258011bb9 move CodeGen/X86/overlap-add.ll here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36799 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-05 22:10:24 +00:00
Anton Korobeynikov
2a07e2f4df Emit sections/directives in the proper order. This fixes PR1376. Also, 
some small cleanup was made.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36780 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-05 09:04:50 +00:00
Lauro Ramos Venancio
a8e9562906 Add a processor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36765 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-04 22:16:30 +00:00
Bill Wendling
4222d806fa Add an "implies" field to features. This indicates that, if the current 
feature is set, then the features in the implied list should be set also.
The opposite is also enforced: if a feature in the implied list isn't set,
then the feature that owns that implies list shouldn't be set either.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36756 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-04 20:38:40 +00:00
Evan Cheng
97c9bb5cc6 On Mac OS X, GV requires an extra load only when relocation-model is non-static. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36718 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-04 00:26:58 +00:00
Evan Cheng
bdc9869dbf Should never see an indexed load / store with zero offset. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36714 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-03 23:30:36 +00:00
Dale Johannesen
4ac075c859 Evan's patch to avoid FPreg->intreg copy for cvt; store to mem 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36693 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-03 20:54:42 +00:00
Lauro Ramos Venancio
e8e5495474 Debug support for arm-linux. 
Patch by Raul Herbster.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36690 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-03 20:28:35 +00:00
Dan Gohman
9570165ef0 Indent the .text, .data, and .bss directives in assembly output, so that 
they are consistent with the other directives.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36687 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-03 18:46:30 +00:00
Chris Lattner
dc43a88b81 Fix two classes of bugs: 
1. x86 backend rejected (&gv+c) for the 'i' constraint when in static mode.
  2. the matcher didn't correctly reject and accept some global addresses.
     the right predicate is GVRequiresExtraLoad, not "relomodel = pic".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36670 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-03 16:52:29 +00:00
Chris Lattner
388488d604 add support for printing offset from global 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36669 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-03 16:42:23 +00:00
Chris Lattner
5f696035e5 revert accidental commit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36668 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-03 16:40:25 +00:00