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5271 Commits

Author SHA1 Message Date
Evan Cheng
4a63100fe3 Add x86 isel logic and patterns to match movlps from clang generated IR for _mm_loadl_pi(). rdar://10134392, rdar://10050222 
llvm-svn: 144052
 2011-11-08 00:31:58 +00:00
Bill Wendling
788df1dca1 Convert to the new EH model. 
llvm-svn: 144049
 2011-11-08 00:17:28 +00:00
Bill Wendling
16499170c2 Convert tests to the new EH model. 
llvm-svn: 144048
 2011-11-08 00:09:27 +00:00
Chad Rosier
4b12a5b7fc Enable support for returning i1, i8, and i16. Nothing special todo as it's the 
callee's responsibility to sign or zero-extend the return value.  The additional
test case just checks to make sure the calls are selected (i.e., -fast-isel-abort
doesn't assert).

llvm-svn: 144047
 2011-11-08 00:03:32 +00:00
Pete Cooper
2f5c35ae89 Added missing newline 
llvm-svn: 144046
 2011-11-08 00:03:24 +00:00
Eli Friedman
8d138bf571 Revert r144034 while I try to track down a crash. 
llvm-svn: 144044
 2011-11-07 23:53:20 +00:00
Jakob Stoklund Olesen
1900a5f521 Fix test for Windows as well. 
llvm-svn: 144038
 2011-11-07 23:10:43 +00:00
Jakob Stoklund Olesen
9380d5daff Kill and collapse outstanding DomainValues. 
DomainValues that are only used by "don't care" instructions are now
collapsed to the first possible execution domain after all basic blocks
have been processed.  This typically means the PS domain on x86.

For example, the vsel_i64 and vsel_double functions in sse2-blend.ll are
completely collapsed to the PS domain instead of containing a mix of
execution domains created by isel.

llvm-svn: 144037
 2011-11-07 23:08:21 +00:00
Pete Cooper
1d5d364e06 InstCombine now optimizes vector udiv by power of 2 to shifts 
Fixes r8429

llvm-svn: 144036
 2011-11-07 23:04:49 +00:00
Eli Friedman
c1bb1b2b09 Add a bunch of calls to RemoveDeadNode in LegalizeDAG, so legalization doesn't get confused by CSE later on. Fixes PR11318. 
llvm-svn: 144034
 2011-11-07 22:51:10 +00:00
Benjamin Kramer
89ebc7ab4b Simplify some uses of utohexstr. 
As a side effect hex is printed lowercase instead of uppercase now.

llvm-svn: 144013
 2011-11-07 21:00:59 +00:00
Jakob Stoklund Olesen
d33a581d93 Fix test for Linux. 
llvm-svn: 144003
 2011-11-07 20:47:23 +00:00
Jakob Stoklund Olesen
b53be3a67d Expand V_SET0 to xorps by default. 
The xorps instruction is smaller than pxor, so prefer that encoding.

The ExecutionDepsFix pass will switch the encoding to pxor and xorpd
when appropriate.

llvm-svn: 143996
 2011-11-07 19:15:58 +00:00
Craig Topper
7eab73f510 Add AVX2 variable shift instructions and intrinsics. 
llvm-svn: 143915
 2011-11-07 08:26:24 +00:00
Craig Topper
b1ef950217 Add AVX2 VPMOVMASK instructions and intrinsics. 
llvm-svn: 143904
 2011-11-07 03:20:35 +00:00
Craig Topper
d422190c0f Add AVX2 VEXTRACTI128 and VINSERTI128 instructions. Fix VPERM2I128 to be qualified with HasAVX2 instead of HasAVX. Mark VINSERTF128 and VEXTRACTF128 as never having side effects. 
llvm-svn: 143902
 2011-11-07 02:00:04 +00:00
Craig Topper
01b852b95a More AVX2 instructions and their intrinsics. 
llvm-svn: 143895
 2011-11-06 23:04:08 +00:00
Craig Topper
31b1d79474 Add more AVX2 instructions and intrinsics. 
llvm-svn: 143861
 2011-11-06 06:12:20 +00:00
Chad Rosier
806ffd8918 Add support for passing i1, i8, and i16 call parameters. Also, be sure to 
zero-extend the constant integer encoding.  Test case provides testing for
both call parameters and materialization of i1, i8, and i16 types.

llvm-svn: 143821
 2011-11-05 20:16:15 +00:00
Benjamin Kramer
4c8932e3b8 Add an option to pad an uleb128 to MCObjectWriter and remove the uleb128 encoding from the DWARF asm printer. 
As a side effect we now print dwarf ulebs with .ascii directives.

llvm-svn: 143809
 2011-11-05 11:52:44 +00:00
Eli Friedman
1478b657c8 Enhanced vzeroupper insertion pass that avoids inserting vzeroupper where it is unnecessary through local analysis. Patch from Bruno Cardoso Lopes, with some additional changes. 
I'm going to wait for any review comments and perform some additional testing before turning this on by default.

llvm-svn: 143750
 2011-11-04 23:46:11 +00:00
Craig Topper
6ae8fe6fbe Add intrinsics for X86 vcvtps2ph and vcvtph2ps instructions 
llvm-svn: 143682
 2011-11-04 06:59:21 +00:00
Chad Rosier
21cd759234 Add fast-isel support for returning i1, i8, and i16. 
llvm-svn: 143669
 2011-11-04 00:50:21 +00:00
Dan Gohman
a5f382da8b Reapply r143206, with fixes. Disallow physical register lifetimes 
across calls, and only check for nested dependences on the special
call-sequence-resource register.

llvm-svn: 143660
 2011-11-03 21:49:52 +00:00
Pete Cooper
ad3d5b2eee Reverted r143600 - selector reference change 
llvm-svn: 143646
 2011-11-03 20:47:50 +00:00
Dan Bailey
986e6b02b8 fixed global array handling for ptx to use the correct bit widths 
llvm-svn: 143640
 2011-11-03 19:24:46 +00:00
Craig Topper
124b2fd08c Add new X86 AVX2 VBROADCAST instructions. 
llvm-svn: 143612
 2011-11-03 07:35:53 +00:00
Chad Rosier
74c4e2c2d9 Add support for sign-extending non-legal types in SelectSIToFP(). 
llvm-svn: 143603
 2011-11-03 02:04:59 +00:00
Pete Cooper
c8a657a2b2 Treat objc selector reference globals as invariant so that MachineLICM can hoist them out of loops. Fixes <rdar://problem/6027699> 
llvm-svn: 143600
 2011-11-03 00:56:36 +00:00
Lang Hames
ceec8ec67e Try to lower memset/memcpy/memmove to vector instructions on ARM where the alignment permits. 
llvm-svn: 143582
 2011-11-02 22:52:45 +00:00
Nick Lewycky
691d7f80c2 Don't emit a directory entry for the value in DW_AT_comp_dir, that is always 
implied by directory index zero.

llvm-svn: 143570
 2011-11-02 20:55:33 +00:00
Chad Rosier
8a613c5ec5 Add support for comparing integer non-legal types. 
llvm-svn: 143559
 2011-11-02 18:08:25 +00:00
Craig Topper
a2a55bd0b4 More AVX2 instructions and intrinsics. 
llvm-svn: 143536
 2011-11-02 06:54:17 +00:00
Craig Topper
c5482eb697 Add a bunch more X86 AVX2 instructions and their corresponding intrinsics. 
llvm-svn: 143529
 2011-11-02 04:42:13 +00:00
Eli Friedman
c60a0ad611 Teach the x86 backend a couple tricks for dealing with v16i8 sra by a constant splat value. Fixes PR11289. 
llvm-svn: 143498
 2011-11-01 21:18:39 +00:00
Richard Osborne
5a9e575e81 Don't fold negative offsets into cp / dp accesses to avoid relocation errors. 
This can happen if the address + addend is less than the start of the cp / dp.

llvm-svn: 143459
 2011-11-01 11:31:53 +00:00
Richard Osborne
8175a9601d Combine various XCore tests for floating point intrinsic support into a single test. 
llvm-svn: 143458
 2011-11-01 10:51:48 +00:00
Richard Osborne
280d51dd14 Move various XCore tests to FileCheck 
llvm-svn: 143457
 2011-11-01 10:41:28 +00:00
Craig Topper
361c873b52 Fix operand type for x86 pmadd_ub_sw intrinsic. 
llvm-svn: 143455
 2011-11-01 07:25:22 +00:00
Craig Topper
dbf10927d7 Fix operand type for int_x86_ssse3_phadd_sw_128 intrinsic 
llvm-svn: 143336
 2011-10-31 07:16:37 +00:00
Craig Topper
c0f93132bd Test case for X86 FS/GS Base intrinsics 
llvm-svn: 143332
 2011-10-31 02:15:47 +00:00
Craig Topper
6eaf58df7c Begin adding AVX2 instructions. No selection support yet other than intrinsics. 
llvm-svn: 143331
 2011-10-31 02:15:10 +00:00
Nick Lewycky
7308946be2 Switch new .file directive emission off by default, change llc's flag for it to 
-enable-dwarf-directory.

llvm-svn: 143326
 2011-10-31 01:06:02 +00:00
Benjamin Kramer
c0001c42c6 X86: Emit logical shift by constant splat of <16 x i8> as a <8 x i16> shift and zero out the bits where zeros should've been shifted in. 
llvm-svn: 143315
 2011-10-30 17:31:21 +00:00
Craig Topper
e77289b243 Fix return type for X86 mpsadbw instrinsic. The instruction takes in a vector of 8-bit integers, but produces a vector of 16-bit integers. 
llvm-svn: 143313
 2011-10-30 17:22:45 +00:00
Nadav Rotem
8282fc9e3b Fix pr11266. 
On x86: (shl V, 1) -> add V,V

Hardware support for vector-shift is sparse and in many cases we scalarize the
result. Additionally, on sandybridge padd is faster than shl.

llvm-svn: 143311
 2011-10-30 13:24:22 +00:00
Nadav Rotem
68400d352b Stabilize the test by specifying an exact cpu target 
llvm-svn: 143307
 2011-10-30 08:07:50 +00:00
Nadav Rotem
6c79131e39 Add a new DAGCombine optimization for BUILD_VECTOR. 
If all of the inputs are zero/any_extended, create a new simple BV
which can be further optimized by other BV optimizations.

llvm-svn: 143297
 2011-10-29 21:23:04 +00:00
Benjamin Kramer
24c4266ada Force SSE for this test. 
llvm-svn: 143291
 2011-10-29 19:43:44 +00:00
Dan Gohman
826cec9a4b Revert r143206, as there are still some failing tests. 
llvm-svn: 143262
 2011-10-29 00:41:52 +00:00