.. |
Windows
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[RegAllocFast] Properly track the physical register definitions on calls.
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2016-02-20 00:32:29 +00:00 |
2006-11-10-CycleInDAG.ll
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2007-01-19-InfiniteLoop.ll
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2007-03-07-CombinerCrash.ll
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2007-03-13-InstrSched.ll
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[ARM] Define subtarget feature "reserve-r9", which is used to decide
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2015-07-21 01:42:02 +00:00 |
2007-03-21-JoinIntervalsCrash.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2007-03-27-RegScavengerAssert.ll
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2007-03-30-RegScavengerAssert.ll
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2007-04-02-RegScavengerAssert.ll
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2007-04-03-PEIBug.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2007-04-03-UndefinedSymbol.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2007-04-30-CombinerCrash.ll
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2007-05-03-BadPostIndexedLd.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2007-05-07-tailmerge-1.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2007-05-09-tailmerge-2.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2007-05-14-InlineAsmCstCrash.ll
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2007-05-14-RegScavengerAssert.ll
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2007-05-22-tailmerge-3.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2007-05-23-BadPreIndexedStore.ll
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2007-08-15-ReuseBug.ll
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2008-02-04-LocalRegAllocBug.ll
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2008-02-29-RegAllocLocal.ll
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2008-03-05-SxtInRegBug.ll
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2008-03-07-RegScavengerAssert.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2008-04-04-ScavengerAssert.ll
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2008-04-10-ScavengerAssert.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2008-04-11-PHIofImpDef.ll
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2008-05-19-LiveIntervalsBug.ll
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2008-05-19-ScavengerAssert.ll
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2008-07-17-Fdiv.ll
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2008-07-24-CodeGenPrepCrash.ll
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2008-08-07-AsmPrintBug.ll
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2008-09-17-CoalescerBug.ll
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2008-11-18-ScavengerAssert.ll
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2009-02-16-SpillerBug.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2009-02-22-SoftenFloatVaArg.ll
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2009-02-27-SpillerBug.ll
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2009-03-07-SpillerBug.ll
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Revert "Change memcpy/memset/memmove to have dest and source alignments."
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2015-11-19 05:56:52 +00:00 |
2009-03-09-AddrModeBug.ll
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2009-04-06-AsmModifier.ll
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2009-04-08-AggregateAddr.ll
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2009-04-08-FloatUndef.ll
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2009-04-08-FREM.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2009-04-09-RegScavengerAsm.ll
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2009-05-05-DAGCombineBug.ll
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2009-05-07-RegAllocLocal.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2009-05-11-CodePlacementCrash.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2009-05-18-InlineAsmMem.ll
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2009-06-02-ISelCrash.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2009-06-04-MissingLiveIn.ll
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2009-06-15-RegScavengerAssert.ll
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2009-06-19-RegScavengerAssert.ll
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2009-06-22-CoalescerBug.ll
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2009-06-30-RegScavengerAssert2.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2009-06-30-RegScavengerAssert3.ll
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2009-06-30-RegScavengerAssert4.ll
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2009-06-30-RegScavengerAssert5.ll
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2009-06-30-RegScavengerAssert.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2009-07-01-CommuteBug.ll
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2009-07-09-asm-p-constraint.ll
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2009-07-18-RewriterBug.ll
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2009-07-22-ScavengerAssert.ll
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2009-07-22-SchedulerAssert.ll
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2009-07-29-VFP3Registers.ll
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2009-08-02-RegScavengerAssert-Neon.ll
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2009-08-04-RegScavengerAssert-2.ll
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2009-08-04-RegScavengerAssert.ll
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2009-08-15-RegScavenger-EarlyClobber.ll
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2009-08-15-RegScavengerAssert.ll
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2009-08-21-PostRAKill2.ll
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2009-08-21-PostRAKill3.ll
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2009-08-21-PostRAKill.ll
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2009-08-26-ScalarToVector.ll
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2009-08-27-ScalarToVector.ll
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2009-08-29-ExtractEltf32.ll
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2009-08-29-TooLongSplat.ll
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2009-08-31-LSDA-Name.ll
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Move the personality function from LandingPadInst to Function
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2015-06-17 20:52:32 +00:00 |
2009-08-31-TwoRegShuffle.ll
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2009-09-09-AllOnes.ll
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2009-09-09-fpcmp-ole.ll
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2009-09-10-postdec.ll
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2009-09-13-InvalidSubreg.ll
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2009-09-13-InvalidSuperReg.ll
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2009-09-20-LiveIntervalsBug.ll
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2009-09-21-LiveVariablesBug.ll
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2009-09-22-LiveVariablesBug.ll
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2009-09-23-LiveVariablesBug.ll
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2009-09-24-spill-align.ll
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2009-09-27-CoalescerBug.ll
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2009-09-28-LdStOptiBug.ll
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2009-10-02-NEONSubregsBug.ll
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2009-10-16-Scope.ll
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DI: Require subprogram definitions to be distinct
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2015-08-28 20:26:49 +00:00 |
2009-10-27-double-align.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2009-10-30.ll
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2009-11-01-NeonMoves.ll
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2009-11-02-NegativeLane.ll
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2009-11-07-SubRegAsmPrinting.ll
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2009-11-13-CoalescerCrash.ll
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2009-11-13-ScavengerAssert2.ll
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2009-11-13-ScavengerAssert.ll
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2009-11-13-VRRewriterCrash.ll
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2009-11-30-LiveVariablesBug.ll
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2009-12-02-vtrn-undef.ll
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2010-03-04-eabi-fp-spill.ll
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2010-03-04-stm-undef-addr.ll
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2010-03-18-ldm-rtrn.ll
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2010-04-09-NeonSelect.ll
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2010-04-13-v2f64SplitArg.ll
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2010-04-14-SplitVector.ll
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2010-04-15-ScavengerDebugValue.ll
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DI: Require subprogram definitions to be distinct
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2015-08-28 20:26:49 +00:00 |
2010-05-14-IllegalType.ll
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2010-05-17-FastAllocCrash.ll
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2010-05-18-LocalAllocCrash.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2010-05-18-PostIndexBug.ll
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2010-05-19-Shuffles.ll
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2010-05-20-NEONSpillCrash.ll
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[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
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2015-09-30 10:56:37 +00:00 |
2010-05-21-BuildVector.ll
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[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
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2015-09-30 10:56:37 +00:00 |
2010-06-11-vmovdrr-bitcast.ll
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[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
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2015-09-30 10:56:37 +00:00 |
2010-06-21-LdStMultipleBug.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2010-06-21-nondarwin-tc.ll
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[opaque pointer type] Add textual IR support for explicit type parameter for global aliases
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2015-09-11 03:22:04 +00:00 |
2010-06-25-Thumb2ITInvalidIterator.ll
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DI: Require subprogram definitions to be distinct
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2015-08-28 20:26:49 +00:00 |
2010-06-29-PartialRedefFastAlloc.ll
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[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
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2015-09-30 10:56:37 +00:00 |
2010-06-29-SubregImpDefs.ll
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2010-07-26-GlobalMerge.ll
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Move the personality function from LandingPadInst to Function
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2015-06-17 20:52:32 +00:00 |
2010-08-04-EHCrash.ll
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Move the personality function from LandingPadInst to Function
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2015-06-17 20:52:32 +00:00 |
2010-08-04-StackVariable.ll
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Reapply r257105 "[Verifier] Check that debug values have proper size"
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2016-01-15 00:46:17 +00:00 |
2010-09-21-OptCmpBug.ll
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2010-10-25-ifcvt-ldm.ll
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2010-11-15-SpillEarlyClobber.ll
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2010-11-29-PrologueBug.ll
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2010-12-07-PEIBug.ll
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2010-12-08-tpsoft.ll
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2010-12-15-elf-lcomm.ll
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[GlobalMerge] Look at uses to create smaller global sets.
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2015-04-18 01:21:58 +00:00 |
2010-12-17-LocalStackSlotCrash.ll
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2011-01-19-MergedGlobalDbg.ll
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DI: Reverse direction of subprogram -> function edge.
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2015-11-05 22:03:56 +00:00 |
2011-02-04-AntidepMultidef.ll
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2011-02-07-AntidepClobber.ll
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2011-03-10-DAGCombineCrash.ll
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Revert "Change memcpy/memset/memmove to have dest and source alignments."
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2015-11-19 05:56:52 +00:00 |
2011-03-15-LdStMultipleBug.ll
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2011-03-23-PeepholeBug.ll
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2011-04-07-schediv.ll
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2011-04-11-MachineLICMBug.ll
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2011-04-12-AlignBug.ll
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2011-04-12-FastRegAlloc.ll
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2011-04-15-AndVFlagPeepholeBug.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2011-04-15-RegisterCmpPeephole.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2011-04-26-SchedTweak.ll
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2011-04-27-IfCvtBug.ll
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2011-05-04-MultipleLandingPadSuccs.ll
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Move the personality function from LandingPadInst to Function
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2015-06-17 20:52:32 +00:00 |
2011-06-09-TailCallByVal.ll
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2011-06-16-TailCallByVal.ll
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2011-06-29-MergeGlobalsAlign.ll
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[GlobalMerge] Use private linkage for MergedGlobals variables
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2015-08-11 15:48:04 +00:00 |
2011-07-10-GlobalMergeBug.ll
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2011-08-02-MergedGlobalDbg.ll
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DI: Reverse direction of subprogram -> function edge.
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2015-11-05 22:03:56 +00:00 |
2011-08-12-vmovqqqq-pseudo.ll
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[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
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2015-09-30 10:56:37 +00:00 |
2011-08-25-ldmia_ret.ll
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2011-08-29-ldr_pre_imm.ll
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2011-08-29-SchedCycle.ll
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2011-09-09-OddVectorDivision.ll
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2011-09-19-cpsr.ll
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2011-09-28-CMovCombineBug.ll
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2011-10-26-ExpandUnalignedLoadCrash.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2011-10-26-memset-inline.ll
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Revert "Change memcpy/memset/memmove to have dest and source alignments."
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2015-11-19 05:56:52 +00:00 |
2011-10-26-memset-with-neon.ll
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Revert "Change memcpy/memset/memmove to have dest and source alignments."
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2015-11-19 05:56:52 +00:00 |
2011-11-07-PromoteVectorLoadStore.ll
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2011-11-09-BitcastVectorDouble.ll
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2011-11-09-IllegalVectorFPIntConvert.ll
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2011-11-14-EarlyClobber.ll
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2011-11-28-DAGCombineBug.ll
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2011-11-29-128bitArithmetics.ll
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2011-11-30-MergeAlignment.ll
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2011-12-14-machine-sink.ll
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2011-12-19-sjlj-clobber.ll
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Move the personality function from LandingPadInst to Function
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2015-06-17 20:52:32 +00:00 |
2012-01-23-PostRA-LICM.ll
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2012-01-24-RegSequenceLiveRange.ll
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[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
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2015-09-30 10:56:37 +00:00 |
2012-01-26-CoalescerBug.ll
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2012-01-26-CopyPropKills.ll
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2012-02-01-CoalescerBug.ll
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2012-03-05-FPSCR-bug.ll
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2012-03-13-DAGCombineBug.ll
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2012-03-26-FoldImmBug.ll
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2012-04-02-TwoAddrInstrCrash.ll
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2012-04-10-DAGCombine.ll
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2012-04-24-SplitEHCriticalEdge.ll
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Revert "Change memcpy/memset/memmove to have dest and source alignments."
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2015-11-19 05:56:52 +00:00 |
2012-05-04-vmov.ll
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2012-05-10-PreferVMOVtoVDUP32.ll
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[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
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2015-09-30 10:56:37 +00:00 |
2012-05-29-TailDupBug.ll
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2012-06-12-SchedMemLatency.ll
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2012-08-04-DtripleSpillReload.ll
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2012-08-08-legalize-unaligned.ll
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2012-08-09-neon-extload.ll
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2012-08-13-bfi.ll
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2012-08-23-legalize-vmull.ll
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2012-08-27-CopyPhysRegCrash.ll
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[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
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2015-09-30 10:56:37 +00:00 |
2012-08-30-select.ll
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2012-09-18-ARMv4ISelBug.ll
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2012-09-25-InlineAsmScalarToVectorConv2.ll
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2012-09-25-InlineAsmScalarToVectorConv.ll
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2012-10-04-AAPCS-byval-align8.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2012-10-04-FixedFrame-vs-byval.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2012-10-04-LDRB_POST_IMM-Crash.ll
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2012-10-18-PR14099-ByvalFrameAddress.ll
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2012-11-14-subs_carry.ll
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[SelectionDAG] Swap commutative binops before constant-based folding
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2015-09-06 05:42:13 +00:00 |
2013-01-21-PR14992.ll
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2013-02-27-expand-vfma.ll
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2013-04-05-Small-ByVal-Structs-PR15293.ll
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2013-04-16-AAPCS-C4-vs-VFP.ll
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2013-04-16-AAPCS-C5-vs-VFP.ll
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ARM: When spilling extra registers for alignment, prefer low registers on all Thumb targets.
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2015-04-23 20:31:26 +00:00 |
2013-04-18-load-overlap-PR14824.ll
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2013-04-21-AAPCS-VA-C.1.cp.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
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2015-04-16 23:24:18 +00:00 |
2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP2.ll
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ARM: When spilling extra registers for alignment, prefer low registers on all Thumb targets.
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2015-04-23 20:31:26 +00:00 |
2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll
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ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2
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2015-07-21 00:18:59 +00:00 |
2013-05-05-IfConvertBug.ll
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2013-05-07-ByteLoadSameAddress.ll
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2013-05-13-AAPCS-byval-padding2.ll
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ARMLoadStoreOptimizer: Rewrite LDM/STM matching logic.
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2015-07-10 18:08:49 +00:00 |
2013-05-13-AAPCS-byval-padding.ll
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2013-05-13-DAGCombiner-undef-mask.ll
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2013-05-31-char-shift-crash.ll
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2013-06-03-ByVal-2Kbytes.ll
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2013-07-29-vector-or-combine.ll
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2013-10-11-select-stalls.ll
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[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
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2015-09-30 10:56:37 +00:00 |
2013-11-08-inline-asm-neon-array.ll
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2014-01-09-pseudo_expand_implicit_reg.ll
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[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
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2015-09-30 10:56:37 +00:00 |
2014-02-05-vfp-regs-after-stack.ll
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2014-02-21-byval-reg-split-alignment.ll
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2014-05-14-DwarfEHCrash.ll
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Move the personality function from LandingPadInst to Function
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2015-06-17 20:52:32 +00:00 |
2014-07-18-earlyclobber-str-post.ll
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2014-08-04-muls-it.ll
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2015-01-21-thumbv4t-ldstr-opt.ll
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a15-mla.ll
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a15-partial-update.ll
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a15-SD-dep.ll
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a15.ll
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aapcs-hfa-code.ll
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aapcs-hfa.ll
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addrmode.ll
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addrspacecast.ll
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adv-copy-opt.ll
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ARM: Enable MachineScheduler and disable PostRAScheduler for swift.
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2015-07-17 23:18:30 +00:00 |
aggregate-padding.ll
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aliases.ll
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[opaque pointer type] Add textual IR support for explicit type parameter for global aliases
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2015-09-11 03:22:04 +00:00 |
align-sp-adjustment.ll
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Align SP adjustment in function getSPAdjust
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2015-08-17 22:36:27 +00:00 |
align.ll
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[MC] Use .p2align instead of .align
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2016-01-26 00:03:25 +00:00 |
alloc-no-stack-realign.ll
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alloca.ll
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apcs-vfp.ll
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ARM: add extra test for watchOS ABI
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2015-10-30 16:29:44 +00:00 |
argaddr.ll
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arguments2.ll
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arguments3.ll
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arguments4.ll
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arguments5.ll
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arguments6.ll
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arguments7.ll
|
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|
arguments8.ll
|
|
|
arguments_f64_backfill.ll
|
|
|
arguments-nosplit-double.ll
|
|
|
arguments-nosplit-i64.ll
|
|
|
arguments.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
|
2015-04-16 23:24:18 +00:00 |
arm32-round-conv.ll
|
|
|
arm32-rounding.ll
|
|
|
arm-abi-attr.ll
|
|
|
arm-and-tst-peephole.ll
|
ARM: fix peephole optimisation of TST
|
2015-04-28 22:03:55 +00:00 |
arm-asm.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
|
2015-04-16 23:24:18 +00:00 |
arm-eabi.ll
|
[EABI] Add LLVM support for -meabi flag
|
2015-11-09 12:40:30 +00:00 |
arm-frameaddr.ll
|
|
|
arm-interleaved-accesses.ll
|
[AArch64][ARM] Don't base interleaved op legality on type alloc size.
|
2015-12-09 01:19:50 +00:00 |
arm-modifier.ll
|
|
|
arm-negative-stride.ll
|
|
|
arm-returnaddr.ll
|
PrologEpilogInserter: Rewrite API to determine callee save regsiters.
|
2015-07-14 17:17:13 +00:00 |
arm-shrink-wrapping-linux.ll
|
[ShrinkWrapping] Do not choose restore point inside loops.
|
2015-12-15 03:28:11 +00:00 |
arm-shrink-wrapping.ll
|
[ARM] Make sure we do not dereference the end iterator when accessing debug
|
2015-10-15 00:41:26 +00:00 |
arm-ttype-target2.ll
|
Move the personality function from LandingPadInst to Function
|
2015-06-17 20:52:32 +00:00 |
armv4.ll
|
|
|
atomic-64bit.ll
|
AArch64: use ldxp/stxp pair to implement 128-bit atomic loads.
|
2015-12-02 18:12:57 +00:00 |
atomic-cmp.ll
|
[ARM] Emit clrex in the expanded cmpxchg fail block.
|
2015-09-22 17:22:58 +00:00 |
atomic-cmpxchg.ll
|
[ARM] Don't generate clrex for pre-v7 targets.
|
2015-09-26 00:14:02 +00:00 |
atomic-load-store.ll
|
|
|
atomic-op.ll
|
[ARM] Emit clrex in the expanded cmpxchg fail block.
|
2015-09-22 17:22:58 +00:00 |
atomic-ops-v8.ll
|
[ARM] Emit clrex in the expanded cmpxchg fail block.
|
2015-09-22 17:22:58 +00:00 |
atomicrmw_minmax.ll
|
|
|
available_externally.ll
|
|
|
avoid-cpsr-rmw.ll
|
ARM: Enable MachineScheduler and disable PostRAScheduler for swift.
|
2015-07-17 23:18:30 +00:00 |
bfc.ll
|
|
|
bfi.ll
|
Properly check if a CMPZ node is in fact comparing against zero
|
2015-11-16 10:49:25 +00:00 |
bfx.ll
|
|
|
bic.ll
|
|
|
bicZext.ll
|
|
|
big-endian-eh-unwind.ll
|
Move the personality function from LandingPadInst to Function
|
2015-06-17 20:52:32 +00:00 |
big-endian-neon-bitconv.ll
|
|
|
big-endian-neon-extend.ll
|
|
|
big-endian-neon-trunc-store.ll
|
|
|
big-endian-ret-f64.ll
|
|
|
big-endian-vector-callee.ll
|
|
|
big-endian-vector-caller.ll
|
|
|
bit-reverse-to-rbit.ll
|
RBIT Instruction only available for ARMv6t2 and above.
|
2016-01-08 18:43:41 +00:00 |
bits.ll
|
|
|
bswap16.ll
|
|
|
bswap-inline-asm.ll
|
|
|
build-attributes-encoding.s
|
[ARM] Add DSP build attribute and extension targeting
|
2016-01-25 11:26:11 +00:00 |
build-attributes-optimization-minsize.ll
|
[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM.
|
2015-12-07 14:22:39 +00:00 |
build-attributes-optimization-mixed.ll
|
[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM.
|
2015-12-07 14:22:39 +00:00 |
build-attributes-optimization-optnone.ll
|
[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM.
|
2015-12-07 14:22:39 +00:00 |
build-attributes-optimization-optsize.ll
|
[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM.
|
2015-12-07 14:22:39 +00:00 |
build-attributes-optimization.ll
|
[ARM] Generate ABI_optimization_goals build attribute, as described in the ARM ARM.
|
2015-12-07 14:22:39 +00:00 |
build-attributes.ll
|
Removed FeatureVFPOnlySP from the Cortex-R7 processor model
|
2016-02-02 09:28:20 +00:00 |
bx_fold.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
|
2015-04-16 23:24:18 +00:00 |
byval_load_align.ll
|
[MC] Use .p2align instead of .align
|
2016-01-26 00:03:25 +00:00 |
byval-align.ll
|
ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2
|
2015-07-21 00:18:59 +00:00 |
cache-intrinsic.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
|
2015-04-16 23:24:18 +00:00 |
call_nolink.ll
|
|
|
call-noret-minsize.ll
|
|
|
call-noret.ll
|
|
|
call-tc.ll
|
[ARM] Enable shrink-wrapping by default.
|
2015-11-18 00:40:54 +00:00 |
call.ll
|
|
|
carry.ll
|
Address buildbot fallout from r259065
|
2016-01-28 18:59:04 +00:00 |
cfi-alignment.ll
|
ARM: add support for WatchOS's compact unwind information.
|
2015-10-28 22:56:36 +00:00 |
clz.ll
|
|
|
cmn.ll
|
|
|
cmpxchg-idioms.ll
|
ARM: Enable MachineScheduler and disable PostRAScheduler for swift.
|
2015-07-17 23:18:30 +00:00 |
cmpxchg-weak.ll
|
[ARM] Emit clrex in the expanded cmpxchg fail block.
|
2015-09-22 17:22:58 +00:00 |
coalesce-dbgvalue.ll
|
DI: Reverse direction of subprogram -> function edge.
|
2015-11-05 22:03:56 +00:00 |
coalesce-subregs.ll
|
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
code-placement.ll
|
|
|
combine-movc-sub.ll
|
[ARM] optimizeSelect should clear kill flags.
|
2015-04-30 23:57:47 +00:00 |
combine-vmovdrr.ll
|
[ARM] When a bitcast is about to be turned into a VMOVDRR, try to combine it
|
2015-12-04 01:53:14 +00:00 |
commute-movcc.ll
|
|
|
compare-call.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
|
2015-04-16 23:24:18 +00:00 |
constant-islands.ll
|
|
|
constantfp.ll
|
|
|
constants.ll
|
AsmPrinter: Use emitGlobalConstantFP to emit elements of constant data
|
2015-12-08 02:37:48 +00:00 |
copy-cpsr.ll
|
|
|
copy-paired-reg.ll
|
|
|
crash-greedy-v6.ll
|
|
|
crash-greedy.ll
|
|
|
crash-O0.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
crash-shufflevector.ll
|
|
|
crash.ll
|
Move the personality function from LandingPadInst to Function
|
2015-06-17 20:52:32 +00:00 |
crc32.ll
|
|
|
cse-call.ll
|
|
|
cse-flags.ll
|
[SelectionDAG] CSE nodes with differing SDNodeFlags
|
2016-01-15 21:56:40 +00:00 |
cse-ldrlit.ll
|
|
|
cse-libcalls.ll
|
|
|
ctor_order.ll
|
|
|
ctors_dtors.ll
|
|
|
cttz_vector.ll
|
ARM: Fix cttz expansion on vector types.
|
2015-07-13 15:37:30 +00:00 |
cttz.ll
|
ARM: Fix cttz expansion on vector types.
|
2015-07-13 15:37:30 +00:00 |
cxx-tlscc.ll
|
CXX_FAST_TLS calling convention: fix issue on ARM.
|
2016-01-15 20:24:11 +00:00 |
dagcombine-anyexttozeroext.ll
|
|
|
dagcombine-concatvector.ll
|
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
darwin-eabi.ll
|
|
|
darwin-tls.ll
|
ARM: support TLS accesses on Darwin platforms
|
2016-01-07 09:03:03 +00:00 |
data-in-code-annotations.ll
|
|
|
dbg.ll
|
|
|
DbgValueOtherTargets.test
|
|
|
debug-frame-large-stack.ll
|
|
|
debug-frame-no-debug.ll
|
Move the personality function from LandingPadInst to Function
|
2015-06-17 20:52:32 +00:00 |
debug-frame-vararg.ll
|
DI: Reverse direction of subprogram -> function edge.
|
2015-11-05 22:03:56 +00:00 |
debug-frame.ll
|
Fix ARMv4T (Thumb1) epilogue generation
|
2015-12-08 19:59:01 +00:00 |
debug-info-arg.ll
|
Use TargetRegisterInfo for printing MachineOperand register comments
|
2015-11-17 16:01:28 +00:00 |
debug-info-blocks.ll
|
Hopefully fix debug-info-blocks.ll test on win32 bot
|
2015-12-19 03:32:23 +00:00 |
debug-info-branch-folding.ll
|
Use TargetRegisterInfo for printing MachineOperand register comments
|
2015-11-17 16:01:28 +00:00 |
debug-info-d16-reg.ll
|
DI: Reverse direction of subprogram -> function edge.
|
2015-11-05 22:03:56 +00:00 |
debug-info-no-frame.ll
|
DI: Reverse direction of subprogram -> function edge.
|
2015-11-05 22:03:56 +00:00 |
debug-info-qreg.ll
|
DI: Reverse direction of subprogram -> function edge.
|
2015-11-05 22:03:56 +00:00 |
debug-info-s16-reg.ll
|
DI: Reverse direction of subprogram -> function edge.
|
2015-11-05 22:03:56 +00:00 |
debug-info-sreg2.ll
|
DI: Reverse direction of subprogram -> function edge.
|
2015-11-05 22:03:56 +00:00 |
debug-segmented-stacks.ll
|
DI: Reverse direction of subprogram -> function edge.
|
2015-11-05 22:03:56 +00:00 |
debugtrap.ll
|
[ARM] Emit trap instruction using .inst directive
|
2016-01-29 10:23:32 +00:00 |
default-float-abi.ll
|
|
|
deps-fix.ll
|
|
|
disable-fp-elim.ll
|
Stop resetting NoFramePointerElim in TargetMachine::resetTargetOptions.
|
2015-05-23 01:14:08 +00:00 |
disable-tail-calls.ll
|
Add explicit -mtriple=arm-unknown to llvm/test/CodeGen/ARM/disable-tail-calls.ll, to satisfy *-win32.
|
2015-06-09 23:33:25 +00:00 |
div.ll
|
[ARM] Use AEABI helpers for i64 div and rem
|
2015-08-24 09:17:18 +00:00 |
divmod-eabi.ll
|
[ARM] Move GNUEABI divmod to __aeabi_divmod*
|
2016-02-03 16:10:54 +00:00 |
divmod.ll
|
|
|
domain-conv-vmovs.ll
|
|
|
dwarf-eh.ll
|
Move the personality function from LandingPadInst to Function
|
2015-06-17 20:52:32 +00:00 |
dwarf-unwind.ll
|
|
|
dyn-stackalloc.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
eh-dispcont.ll
|
Move the personality function from LandingPadInst to Function
|
2015-06-17 20:52:32 +00:00 |
eh-resume-darwin.ll
|
ARMv7k: base ABI decision on v7k Arch rather than watchos OS.
|
2016-01-27 19:32:29 +00:00 |
ehabi-filters.ll
|
Move the personality function from LandingPadInst to Function
|
2015-06-17 20:52:32 +00:00 |
ehabi-handlerdata-nounwind.ll
|
[MC] Use .p2align instead of .align
|
2016-01-26 00:03:25 +00:00 |
ehabi-handlerdata.ll
|
[MC] Use .p2align instead of .align
|
2016-01-26 00:03:25 +00:00 |
ehabi-no-landingpad.ll
|
|
|
ehabi-unwind.ll
|
|
|
ehabi.ll
|
Move the personality function from LandingPadInst to Function
|
2015-06-17 20:52:32 +00:00 |
elf-lcomm-align.ll
|
|
|
emit-big-cst.ll
|
|
|
emutls1.ll
|
Implement target independent TLS compatible with glibc's emutls.c.
|
2015-07-28 16:24:05 +00:00 |
emutls_generic.ll
|
[MC] Use .p2align instead of .align
|
2016-01-26 00:03:25 +00:00 |
emutls.ll
|
[TLS] New lower emutls pass, fix linkage bugs.
|
2016-01-13 23:56:37 +00:00 |
extload-knownzero.ll
|
|
|
extloadi1.ll
|
|
|
fabs-neon.ll
|
|
|
fabs-to-bfc.ll
|
Guard fabs to bfc convert with V6T2 flag
|
2016-01-13 00:03:35 +00:00 |
fabss.ll
|
|
|
fadds.ll
|
|
|
fast-isel-align.ll
|
[ARM] Define subtarget feature strict-align.
|
2015-07-28 22:44:28 +00:00 |
fast-isel-binary.ll
|
|
|
fast-isel-br-const.ll
|
|
|
fast-isel-br-phi.ll
|
|
|
fast-isel-call-multi-reg-return.ll
|
|
|
fast-isel-call.ll
|
[ARM] Define a subtarget feature and use it to decide whether long calls should
|
2015-07-07 06:54:42 +00:00 |
fast-isel-cmp-imm.ll
|
|
|
fast-isel-conversion.ll
|
|
|
fast-isel-crash2.ll
|
|
|
fast-isel-crash.ll
|
|
|
fast-isel-deadcode.ll
|
|
|
fast-isel-ext.ll
|
Limit the range of processors supported by ARM fast isel to v6 or
|
2015-09-18 20:08:18 +00:00 |
fast-isel-fold.ll
|
|
|
fast-isel-frameaddr.ll
|
|
|
fast-isel-GEP-coalesce.ll
|
|
|
fast-isel-icmp.ll
|
|
|
fast-isel-indirectbr.ll
|
|
|
fast-isel-inline-asm.ll
|
|
|
fast-isel-intrinsic.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
fast-isel-ldr-str-arm.ll
|
|
|
fast-isel-ldr-str-thumb-neg-index.ll
|
|
|
fast-isel-ldrh-strh-arm.ll
|
|
|
fast-isel-load-store-verify.ll
|
|
|
fast-isel-mvn.ll
|
[ARM] Define a subtarget feature that is used to avoid using movt/movw
|
2015-07-16 00:58:23 +00:00 |
fast-isel-pic.ll
|
Fix tests.
|
2015-10-26 20:49:49 +00:00 |
fast-isel-pred.ll
|
|
|
fast-isel-redefinition.ll
|
|
|
fast-isel-remat-same-constant.ll
|
[Fast-ISel] Don't mark the first use of a remat constant as killed.
|
2015-05-09 00:51:03 +00:00 |
fast-isel-ret.ll
|
|
|
fast-isel-select.ll
|
[ARM][FastISel] Use TST #1 instead of CMP #0 for select.
|
2015-05-06 04:14:02 +00:00 |
fast-isel-shift-materialize.ll
|
Fix incorrect kill flags in fastisel.
|
2015-05-06 22:09:29 +00:00 |
fast-isel-shifter.ll
|
|
|
fast-isel-static.ll
|
[ARM] Define a subtarget feature and use it to decide whether long calls should
|
2015-07-07 06:54:42 +00:00 |
fast-isel-update-valuemap-for-extract.ll
|
[Fast-ISel] Clear kill flags on registers replaced by updateValueMap.
|
2015-05-08 20:46:54 +00:00 |
fast-isel-vaddd.ll
|
[ARM] Fast-Isel was incorrectly selecting <2 x double> adds.
|
2015-05-06 16:39:17 +00:00 |
fast-isel-vararg.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
|
2015-04-16 23:24:18 +00:00 |
fast-isel.ll
|
|
|
fast-tail-call.ll
|
[ARM] Add B.W and CBZ instructions to ARMv8-M Baseline
|
2016-01-15 10:26:17 +00:00 |
fastcc-vfp.ll
|
|
|
fastisel-gep-promote-before-add.ll
|
|
|
fastisel-thumb-litpool.ll
|
|
|
fcopysign.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
|
2015-04-16 23:24:18 +00:00 |
fdivs.ll
|
|
|
fixunsdfdi.ll
|
|
|
flag-crash.ll
|
|
|
floorf.ll
|
|
|
fmacs.ll
|
|
|
fmdrr-fmrrd.ll
|
|
|
fmscs.ll
|
|
|
fmuls.ll
|
|
|
fnattr-trap.ll
|
llvm/test/CodeGen/ARM/fnattr-trap.ll: Add -mtriple, to appease targeting *-win32.
|
2015-07-03 08:21:38 +00:00 |
fnegs.ll
|
|
|
fnmacs.ll
|
|
|
fnmscs.ll
|
|
|
fnmul.ll
|
|
|
fnmuls.ll
|
|
|
fold-const.ll
|
|
|
fold-stack-adjust.ll
|
[ARM] Enable shrink-wrapping by default.
|
2015-11-18 00:40:54 +00:00 |
formal.ll
|
|
|
fp16-args.ll
|
Do not ASSERTZEXT for i16 result of bitcast from f16 operand
|
2016-01-08 17:46:05 +00:00 |
fp16-promote.ll
|
[CodeGen] Always promote f16 if not legal
|
2015-11-09 11:03:18 +00:00 |
fp16-v3.ll
|
Do not ASSERTZEXT for i16 result of bitcast from f16 operand
|
2016-01-08 17:46:05 +00:00 |
fp16.ll
|
[CodeGen] Don't assume fp_to_fp16 produces i16 when legalizing it.
|
2016-01-14 19:45:36 +00:00 |
fp_convert.ll
|
|
|
fp-arg-shuffle.ll
|
|
|
fp-fast.ll
|
|
|
fp.ll
|
|
|
fparith.ll
|
[ARM] Fix up buildbots after r246360
|
2015-08-29 11:50:08 +00:00 |
fpcmp_ueq.ll
|
|
|
fpcmp-f64-neon-opt.ll
|
|
|
fpcmp-opt.ll
|
|
|
fpcmp.ll
|
|
|
fpconsts.ll
|
|
|
fpconv.ll
|
|
|
fpmem.ll
|
|
|
fpow.ll
|
|
|
fpowi.ll
|
|
|
fptoint.ll
|
|
|
frame-register.ll
|
|
|
fsubs.ll
|
|
|
func-argpassing-endian.ll
|
|
|
fusedMAC.ll
|
|
|
gep-optimization.ll
|
[DAGCombiner] Fold together mul and shl when both are by a constant
|
2015-08-21 10:48:17 +00:00 |
ghc-tcreturn-lowered.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
|
2015-04-16 23:24:18 +00:00 |
global-merge-1.ll
|
[GlobalMerge] Use private linkage for MergedGlobals variables
|
2015-08-11 15:48:04 +00:00 |
global-merge-addrspace.ll
|
Changed renaming of local symbols by inserting a dot vefore the numeric suffix.
|
2015-05-12 16:47:30 +00:00 |
global-merge-external.ll
|
Redo "Make global aliases have symbol size equal to their type"
|
2015-08-12 15:05:39 +00:00 |
global-merge.ll
|
Move the personality function from LandingPadInst to Function
|
2015-06-17 20:52:32 +00:00 |
globals.ll
|
[MC] Use .p2align instead of .align
|
2016-01-26 00:03:25 +00:00 |
gpr-paired-spill-thumbinst.ll
|
|
|
gpr-paired-spill.ll
|
|
|
gv-stubs-crash.ll
|
Move the personality function from LandingPadInst to Function
|
2015-06-17 20:52:32 +00:00 |
half.ll
|
[CodeGen] Use standard -not gnueabi- naming for f16 libcalls on Darwin.
|
2015-05-14 01:00:51 +00:00 |
hardfloat_neon.ll
|
|
|
hello.ll
|
Fix some erroneous lit test failures due to unlucky name of working directory.
|
2016-02-17 16:35:18 +00:00 |
hfa-in-contiguous-registers.ll
|
|
|
hidden-vis-2.ll
|
|
|
hidden-vis-3.ll
|
|
|
hidden-vis.ll
|
|
|
hints.ll
|
|
|
iabs.ll
|
|
|
ifconv-kills.ll
|
|
|
ifconv-regmask.ll
|
|
|
ifcvt1.ll
|
|
|
ifcvt2.ll
|
|
|
ifcvt3.ll
|
Re-commit r235560: Switch lowering: extract jump tables and bit tests before building binary tree (PR22262)
|
2015-04-23 16:45:24 +00:00 |
ifcvt4.ll
|
Scaling up values in ARMBaseInstrInfo::isProfitableToIfCvt() before they are scaled by a probability to avoid precision issue.
|
2015-09-18 18:19:40 +00:00 |
ifcvt5.ll
|
[ARM] Enable shrink-wrapping by default.
|
2015-11-18 00:40:54 +00:00 |
ifcvt6.ll
|
[ARM] Enable shrink-wrapping by default.
|
2015-11-18 00:40:54 +00:00 |
ifcvt7.ll
|
|
|
ifcvt8.ll
|
[ARM] Enable shrink-wrapping by default.
|
2015-11-18 00:40:54 +00:00 |
ifcvt9.ll
|
|
|
ifcvt10.ll
|
|
|
ifcvt11.ll
|
|
|
ifcvt12.ll
|
|
|
ifcvt-branch-weight-bug.ll
|
Replace all weight-based interfaces in MBB with probability-based interfaces, and update all uses of old interfaces.
|
2015-12-01 05:29:22 +00:00 |
ifcvt-branch-weight.ll
|
Replace all weight-based interfaces in MBB with probability-based interfaces, and update all uses of old interfaces.
|
2015-12-01 05:29:22 +00:00 |
ifcvt-callback.ll
|
[ARM] Pass a callback to FunctionPass constructors to enable skipping execution
|
2015-06-08 18:50:43 +00:00 |
ifcvt-dead-def.ll
|
Handle dead defs in the if converter.
|
2015-05-06 22:51:04 +00:00 |
ifcvt-iter-indbr.ll
|
Replace all weight-based interfaces in MBB with probability-based interfaces, and update all uses of old interfaces.
|
2015-12-01 05:29:22 +00:00 |
ifcvt-regmask-noreturn.ll
|
Fix IfConverter to handle regmask machine operands.
|
2015-05-05 22:09:41 +00:00 |
illegal-vector-bitcast.ll
|
|
|
imm.ll
|
|
|
indirect-hidden.ll
|
|
|
indirect-reg-input.ll
|
|
|
indirectbr-2.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
|
2015-04-16 23:24:18 +00:00 |
indirectbr-3.ll
|
|
|
indirectbr.ll
|
|
|
inline-diagnostics.ll
|
|
|
inlineasm2.ll
|
|
|
inlineasm3.ll
|
|
|
inlineasm4.ll
|
|
|
inlineasm-64bit.ll
|
|
|
inlineasm-global.ll
|
|
|
inlineasm-imm-arm.ll
|
|
|
inlineasm-imm-thumb2.ll
|
Add some testing for thumb1 and thumb2 inline asm immediate constraints
|
2016-01-08 00:34:44 +00:00 |
inlineasm-imm-thumb.ll
|
Add some testing for thumb1 and thumb2 inline asm immediate constraints
|
2016-01-08 00:34:44 +00:00 |
inlineasm-ldr-pseudo.ll
|
|
|
inlineasm-switch-mode-oneway-from-arm.ll
|
|
|
inlineasm-switch-mode-oneway-from-thumb.ll
|
|
|
inlineasm-switch-mode.ll
|
[llvm-objdump] Use the COFF export table for additional symbols
|
2015-11-18 02:49:19 +00:00 |
inlineasm.ll
|
|
|
insn-sched1.ll
|
|
|
int-to-fp.ll
|
|
|
integer_insertelement.ll
|
|
|
interrupt-attr.ll
|
ARM: When spilling extra registers for alignment, prefer low registers on all Thumb targets.
|
2015-04-23 20:31:26 +00:00 |
intrinsics-crypto.ll
|
|
|
intrinsics-memory-barrier.ll
|
|
|
intrinsics-overflow.ll
|
|
|
intrinsics-v8.ll
|
|
|
intrinsics.ll
|
|
|
invalid-target.ll
|
|
|
invoke-donothing-assert.ll
|
Move the personality function from LandingPadInst to Function
|
2015-06-17 20:52:32 +00:00 |
isel-v8i32-crash.ll
|
|
|
ispositive.ll
|
|
|
jump-table-islands-split.ll
|
ARM: recommit r237590: allow jump tables to be placed as constant islands.
|
2015-05-31 19:22:07 +00:00 |
jump-table-islands.ll
|
Distribute the weight on the edge from switch to default statement to edges generated in lowering switch.
|
2015-09-01 01:42:16 +00:00 |
jumptable-label.ll
|
ARM: recommit r237590: allow jump tables to be placed as constant islands.
|
2015-05-31 19:22:07 +00:00 |
krait-cpu-div-attribute.ll
|
|
|
large-stack.ll
|
|
|
ldaex-stlex.ll
|
|
|
ldm-stm-base-materialization.ll
|
[ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM.
|
2015-10-05 14:49:54 +00:00 |
ldm.ll
|
|
|
ldr_ext.ll
|
|
|
ldr_frame.ll
|
Fix some erroneous lit test failures due to unlucky name of working directory.
|
2016-02-17 16:35:18 +00:00 |
ldr_post.ll
|
|
|
ldr_pre.ll
|
|
|
ldr.ll
|
|
|
ldrd-memoper.ll
|
|
|
ldrd.ll
|
Add missing load/store flags to thumb2 instructions.
|
2015-10-22 01:48:57 +00:00 |
ldst-f32-2-i32.ll
|
|
|
ldstrex-m.ll
|
[ARM] Add ARMv8-A semaphore/atomic instructions to ARMv8-M Baseline/Mainline
|
2016-01-15 10:26:51 +00:00 |
ldstrex.ll
|
|
|
legalize-unaligned-load.ll
|
[ARM] Add a test case for revision 243956.
|
2015-09-03 16:49:18 +00:00 |
lit.local.cfg
|
|
|
load_i1_select.ll
|
|
|
load-address-masked.ll
|
|
|
load-global.ll
|
ARM/ELF: Better codegen for global variable addresses.
|
2015-10-26 18:23:16 +00:00 |
load-store-flags.ll
|
[ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM.
|
2015-10-05 14:49:54 +00:00 |
load.ll
|
[ARM] Reorganise and simplify thumb-1 load/store selection
|
2015-08-13 10:48:22 +00:00 |
log2_not_readnone.ll
|
|
|
long_shift.ll
|
|
|
long-setcc.ll
|
|
|
long.ll
|
|
|
longMAC.ll
|
|
|
lsr-code-insertion.ll
|
|
|
lsr-icmp-imm.ll
|
|
|
lsr-scale-addr-mode.ll
|
|
|
lsr-unfolded-offset.ll
|
|
|
machine-cse-cmp.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
machine-licm.ll
|
|
|
MachO-subtypes.ll
|
[ARM] Fix MachO CPU Subtype selection
|
2015-08-21 21:52:48 +00:00 |
mature-mc-support.ll
|
|
|
mem.ll
|
|
|
memcpy-inline.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
memcpy-ldm-stm.ll
|
[ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM.
|
2015-10-05 14:49:54 +00:00 |
memfunc.ll
|
[MC] Use .p2align instead of .align
|
2016-01-26 00:03:25 +00:00 |
memset-inline.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
MergeConsecutiveStores.ll
|
|
|
metadata-default.ll
|
|
|
metadata-short-enums.ll
|
|
|
metadata-short-wchar.ll
|
|
|
minmax.ll
|
[ARM] Add instruction selection patterns for vmin/vmax
|
2015-08-19 14:11:27 +00:00 |
minsize-imms.ll
|
|
|
minsize-litpools.ll
|
|
|
misched-copy-arm.ll
|
|
|
mls.ll
|
|
|
movcc-double.ll
|
|
|
movt-movw-global.ll
|
|
|
movt.ll
|
[ARM] Add MOVW/MOVT instructions to ARMv8-M Baseline/Mainline
|
2016-01-15 10:25:14 +00:00 |
mul_const.ll
|
|
|
mul.ll
|
|
|
mulhi.ll
|
|
|
mult-alt-generic-arm.ll
|
|
|
mvn.ll
|
|
|
named-reg-alloc.ll
|
Re-commit of r238201 with fix for building with shared libraries.
|
2015-06-01 12:02:47 +00:00 |
named-reg-notareg.ll
|
Re-commit of r238201 with fix for building with shared libraries.
|
2015-06-01 12:02:47 +00:00 |
negative-offset.ll
|
|
|
neon_arith1.ll
|
|
|
neon_cmp.ll
|
|
|
neon_div.ll
|
|
|
neon_fpconv.ll
|
|
|
neon_ld1.ll
|
|
|
neon_ld2.ll
|
|
|
neon_minmax.ll
|
[ARM] Fix crash when targetting CPU without NEON
|
2015-08-17 19:37:12 +00:00 |
neon_shift.ll
|
|
|
neon_spill.ll
|
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
neon_vabs.ll
|
[ARM] Match VABDL from log2 shuffles.
|
2015-11-17 13:21:35 +00:00 |
neon_vshl_minint.ll
|
When lowering vector shifts a check is performed to see if the value to shift by
|
2015-07-24 09:31:48 +00:00 |
neon-fma.ll
|
|
|
neon-spfp.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
|
2015-04-16 23:24:18 +00:00 |
neon-v8.1a.ll
|
[ARM] Add v8.1a "Rounding Double Multiply Add/Subtract" extension
|
2015-03-26 18:29:02 +00:00 |
nest-register.ll
|
[ARM] Add support for nest attribute using r12
|
2015-07-12 18:16:40 +00:00 |
no-fpu.ll
|
|
|
no-tail-call.ll
|
|
|
none-macho-v4t.ll
|
|
|
none-macho.ll
|
|
|
noopt-dmb-v7.ll
|
[Target/ARM] Only enable OptimizeBarrierPass at -O1 and above.
|
2015-05-20 21:40:38 +00:00 |
nop_concat_vectors.ll
|
|
|
noreturn.ll
|
|
|
null-streamer.ll
|
|
|
opt-shuff-tstore.ll
|
|
|
optimize-dmbs-v7.ll
|
[Target/ARM] Only enable OptimizeBarrierPass at -O1 and above.
|
2015-05-20 21:40:38 +00:00 |
optselect-regclass.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
|
2015-04-16 23:24:18 +00:00 |
out-of-registers.ll
|
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
pack.ll
|
|
|
peephole-bitcast.ll
|
|
|
phi.ll
|
|
|
pic.ll
|
|
|
popcnt.ll
|
|
|
pr3502.ll
|
|
|
pr13249.ll
|
|
|
pr18364-movw.ll
|
|
|
pr25317.ll
|
[ARM] Handle the inline asm constraint type 'o'
|
2015-10-26 10:04:52 +00:00 |
pr25838.ll
|
Fix PR25838.
|
2015-12-17 01:29:08 +00:00 |
pr26669.ll
|
[SjLjEHPrepare] Don't grab pointers to functions in doInitialization
|
2016-02-19 03:13:40 +00:00 |
PR15053.ll
|
|
|
preferred-align.ll
|
[MC] Use .p2align instead of .align
|
2016-01-26 00:03:25 +00:00 |
prefetch.ll
|
|
|
print-memb-operand.ll
|
[ARM] Enable changing instprinter's behavior based on the per-function
|
2015-03-27 23:41:42 +00:00 |
private.ll
|
|
|
rbit.ll
|
[ARM] Replace ARMISD::RBIT with ISD::BITREVERSE
|
2015-11-13 16:05:22 +00:00 |
readcyclecounter.ll
|
|
|
reg_sequence.ll
|
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
regpair_hint_phys.ll
|
ARM: Handle physreg targets in RegPair hints gracefully
|
2015-04-03 00:18:38 +00:00 |
ret0.ll
|
|
|
ret_arg1.ll
|
|
|
ret_arg2.ll
|
|
|
ret_arg3.ll
|
|
|
ret_arg4.ll
|
|
|
ret_arg5.ll
|
|
|
ret_f32_arg2.ll
|
|
|
ret_f32_arg5.ll
|
|
|
ret_f64_arg2.ll
|
|
|
ret_f64_arg_reg_split.ll
|
|
|
ret_f64_arg_split.ll
|
|
|
ret_f64_arg_stack.ll
|
|
|
ret_i64_arg2.ll
|
|
|
ret_i64_arg3.ll
|
|
|
ret_i64_arg_split.ll
|
|
|
ret_i128_arg2.ll
|
|
|
ret_sret_vector.ll
|
|
|
ret_void.ll
|
|
|
returned-ext.ll
|
|
|
returned-trunc-tail-calls.ll
|
|
|
rev.ll
|
|
|
rotate.ll
|
[ARM] Expand ROTL and ROTR of vector value types
|
2015-10-27 10:25:20 +00:00 |
sat-arith.ll
|
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2
|
2015-12-20 06:41:44 +00:00 |
saxpy10-a9.ll
|
Complete the MachineScheduler fix made way back in r210390.
|
2015-03-27 06:10:13 +00:00 |
sbfx.ll
|
|
|
section-name.ll
|
|
|
section.ll
|
|
|
segmented-stacks-dynamic.ll
|
|
|
segmented-stacks.ll
|
|
|
select_xform.ll
|
|
|
select-imm.ll
|
|
|
select-undef.ll
|
|
|
select.ll
|
|
|
setcc-sentinals.ll
|
|
|
setcc-type-mismatch.ll
|
|
|
setjmp_longjmp.ll
|
Fix __builtin_setjmp in combination with sjlj exception handling.
|
2015-07-16 22:34:16 +00:00 |
shifter_operand.ll
|
ARM: don't mangle DAG constant if it has more than one use
|
2016-01-29 19:18:46 +00:00 |
shuffle.ll
|
|
|
sincos.ll
|
|
|
sjlj-prepare-critical-edge.ll
|
Scaling up values in ARMBaseInstrInfo::isProfitableToIfCvt() before they are scaled by a probability to avoid precision issue.
|
2015-09-18 18:19:40 +00:00 |
sjljehprepare-lower-empty-struct.ll
|
ARMv7k: base ABI decision on v7k Arch rather than watchos OS.
|
2016-01-27 19:32:29 +00:00 |
smml.ll
|
|
|
smul.ll
|
|
|
smulw.ll
|
|
|
softfp-fabs-fneg.ll
|
[ARM] Hoist fabs/fneg above a conversion to float.
|
2015-08-29 10:49:11 +00:00 |
space-directive.ll
|
|
|
special-reg-acore.ll
|
Re-commit of r238201 with fix for building with shared libraries.
|
2015-06-01 12:02:47 +00:00 |
special-reg-mcore.ll
|
ARMISelDAGToDAG.cpp had this self-contradictory code:
|
2015-08-05 11:02:14 +00:00 |
special-reg-v8m-base.ll
|
[ARM] Add new system registers to ARMv8-M Baseline/Mainline
|
2016-01-25 11:25:36 +00:00 |
special-reg-v8m-main.ll
|
[ARM] Add new system registers to ARMv8-M Baseline/Mainline
|
2016-01-25 11:25:36 +00:00 |
special-reg.ll
|
Re-commit of r238201 with fix for building with shared libraries.
|
2015-06-01 12:02:47 +00:00 |
spill-q.ll
|
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
ssat-lower.ll
|
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2
|
2015-12-20 06:41:44 +00:00 |
ssat-upper.ll
|
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2
|
2015-12-20 06:41:44 +00:00 |
ssp-data-layout.ll
|
|
|
stack_guard_remat.ll
|
|
|
stack-alignment.ll
|
|
|
stack-frame.ll
|
|
|
stack-protector-bmovpcb_call.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
stackpointer.ll
|
|
|
stm.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
|
2015-04-16 23:24:18 +00:00 |
str_post.ll
|
|
|
str_pre-2.ll
|
|
|
str_pre.ll
|
|
|
str_trunc.ll
|
|
|
struct_byval_arm_t1_t2.ll
|
|
|
struct_byval.ll
|
Use movw/movt instead of constant pool loads to lower byval parameter copies
|
2015-03-26 22:11:00 +00:00 |
struct-byval-frame-index.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
sub-cmp-peephole.ll
|
|
|
sub.ll
|
|
|
subreg-remat.ll
|
|
|
subtarget-features-long-calls.ll
|
Fix test case to unbreak build.
|
2015-07-07 14:45:12 +00:00 |
subtarget-no-movt.ll
|
[ARM] Define a subtarget feature that is used to avoid using movt/movw
|
2015-07-16 00:58:23 +00:00 |
swift-atomics.ll
|
|
|
swift-vldm.ll
|
|
|
sxt_rot.ll
|
|
|
t2-imm.ll
|
|
|
t2abs-killflags.ll
|
Don't always apply kill flag in thumb2 ABS pseudo expansion.
|
2015-04-30 22:15:59 +00:00 |
tail-call-weak.ll
|
|
|
tail-call.ll
|
|
|
tail-dup-kill-flags.ll
|
Clear kill flags in tail duplication.
|
2015-05-07 21:48:26 +00:00 |
tail-dup.ll
|
|
|
tail-merge-branch-weight.ll
|
Replace all weight-based interfaces in MBB with probability-based interfaces, and update all uses of old interfaces.
|
2015-12-01 05:29:22 +00:00 |
tail-opts.ll
|
|
|
taildup-branch-weight.ll
|
Improve the successor list update in TailDuplication.cpp.
|
2015-12-15 10:10:40 +00:00 |
test-sharedidx.ll
|
Scaling up values in ARMBaseInstrInfo::isProfitableToIfCvt() before they are scaled by a probability to avoid precision issue.
|
2015-09-18 18:19:40 +00:00 |
this-return.ll
|
|
|
thread_pointer.ll
|
|
|
thumb1_return_sequence.ll
|
[ARM] For old thumb ISA like v4t, we cannot use PC directly in pop.
|
2015-11-30 20:37:58 +00:00 |
thumb1-ldst-opt.ll
|
When printing MIR, output to errs() rather than outs().
|
2016-02-19 00:18:46 +00:00 |
thumb1-varalloc.ll
|
|
|
thumb2-it-block.ll
|
Be less conservative about forming IT blocks.
|
2015-08-03 09:24:48 +00:00 |
thumb2-size-opt.ll
|
|
|
thumb2-size-reduction-internal-flags.ll
|
Commute the internal flag on MachineOperands.
|
2015-04-30 23:14:14 +00:00 |
thumb_indirect_calls.ll
|
Fix CHECK directives that weren't checking.
|
2015-08-31 21:10:35 +00:00 |
thumb-alignment.ll
|
[MC] Use .p2align instead of .align
|
2016-01-26 00:03:25 +00:00 |
thumb-big-stack.ll
|
[ARM][TEST] Strengthen test against smarter reg alloc.
|
2015-05-01 00:45:55 +00:00 |
thumb-litpool.ll
|
|
|
tls1.ll
|
|
|
tls2.ll
|
|
|
tls3.ll
|
[MC] Use .p2align instead of .align
|
2016-01-26 00:03:25 +00:00 |
tls-models.ll
|
[MC] Use .p2align instead of .align
|
2016-01-26 00:03:25 +00:00 |
trap.ll
|
[ARM] Emit trap instruction using .inst directive
|
2016-01-29 10:23:32 +00:00 |
trunc_ldr.ll
|
|
|
truncstore-dag-combine.ll
|
Fix some erroneous lit test failures due to unlucky name of working directory.
|
2016-02-17 16:35:18 +00:00 |
tst_teq.ll
|
|
|
twoaddrinstr.ll
|
|
|
uint64tof64.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
|
2015-04-16 23:24:18 +00:00 |
umulo-32.ll
|
|
|
unaligned_load_store_vector.ll
|
|
|
unaligned_load_store_vfp.ll
|
ARM: make sure VFP loads and stores are properly aligned.
|
2015-10-26 21:32:53 +00:00 |
unaligned_load_store.ll
|
[ARM] Define subtarget feature strict-align.
|
2015-07-28 22:44:28 +00:00 |
undef-sext.ll
|
|
|
undefined.ll
|
|
|
unord.ll
|
|
|
unsafe-fsub.ll
|
|
|
unwind-init.ll
|
|
|
usat-lower.ll
|
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2
|
2015-12-20 06:41:44 +00:00 |
usat-upper.ll
|
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions for Thumb2
|
2015-12-20 06:41:44 +00:00 |
uxt_rot.ll
|
|
|
uxtb.ll
|
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v1-constant-fold.ll
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v7k-abi-align.ll
|
ARM: add support for WatchOS's compact unwind information.
|
2015-10-28 22:56:36 +00:00 |
v7k-libcalls.ll
|
ARM: teach backend about WatchOS and TvOS libcalls.
|
2015-10-28 22:51:16 +00:00 |
v7k-sincos.ll
|
ARM: teach backend about WatchOS and TvOS libcalls.
|
2015-10-28 22:51:16 +00:00 |
va_arg.ll
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vaba.ll
|
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vabd.ll
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vabs.ll
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vadd.ll
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vararg_no_start.ll
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varargs-spill-stack-align-nacl.ll
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vargs_align.ll
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vargs.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
|
2015-04-16 23:24:18 +00:00 |
vbits.ll
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vbsl-constant.ll
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vbsl.ll
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vceq.ll
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vcge.ll
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[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
vcgt.ll
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vcnt.ll
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vcombine.ll
|
Introduce target hook for optimizing register copies
|
2015-09-24 08:36:14 +00:00 |
vcvt_combine.ll
|
[ARM] Simplify tests and make checks more rigid. NFC.
|
2015-10-06 17:54:12 +00:00 |
vcvt-cost.ll
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vcvt-v8.ll
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vcvt.ll
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[SDAG] Move TRUNCATE splitting logic into a helper, and use
|
2015-03-31 10:20:58 +00:00 |
vdiv_combine.ll
|
[ARM] Promote helper function to SelectionDAG.
|
2015-10-07 17:28:58 +00:00 |
vdup.ll
|
[ARM] Don't abort on variable-idx extractelt in ReconstructShuffle.
|
2015-09-01 21:56:00 +00:00 |
vector-DAGCombine.ll
|
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
vector-extend-narrow.ll
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vector-load.ll
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ARM: Enable MachineScheduler and disable PostRAScheduler for swift.
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2015-07-17 23:18:30 +00:00 |
vector-promotion.ll
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vector-spilling.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
|
2015-04-16 23:24:18 +00:00 |
vector-store.ll
|
ARM: Enable MachineScheduler and disable PostRAScheduler for swift.
|
2015-07-17 23:18:30 +00:00 |
vext.ll
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[ARM][AArch64] Turn on by default interleaved access lowering
|
2015-09-01 11:12:35 +00:00 |
vfcmp.ll
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vfloatintrinsics.ll
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vfp-libcalls.ll
|
Migrate existing backends that care about software floating point
|
2015-05-12 01:26:05 +00:00 |
vfp-reg-stride.ll
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ARM: add support for WatchOS's compact unwind information.
|
2015-10-28 22:56:36 +00:00 |
vfp-regs-dwarf.ll
|
DI: Reverse direction of subprogram -> function edge.
|
2015-11-05 22:03:56 +00:00 |
vfp.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
|
2015-04-16 23:24:18 +00:00 |
vget_lane.ll
|
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vhadd.ll
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vhsub.ll
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vicmp.ll
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vld1.ll
|
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
vld2.ll
|
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
vld3.ll
|
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
vld4.ll
|
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
vld-vst-upgrade.ll
|
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
vlddup.ll
|
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
vldlane.ll
|
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
vldm-liveness.ll
|
|
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vldm-sched-a9.ll
|
|
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vminmax.ll
|
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vminmaxnm-safe.ll
|
[ARM] Rejig vmax tests a bit
|
2015-08-13 17:28:16 +00:00 |
vminmaxnm.ll
|
Generate FMINNAN/FMINNUM/FMAXNAN/FMAXNUM from SDAGBuilder.
|
2015-08-17 07:13:10 +00:00 |
vmla.ll
|
|
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vmls.ll
|
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vmov.ll
|
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
vmul.ll
|
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
vneg.ll
|
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vpadal.ll
|
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vpadd.ll
|
[ARM][AArch64] Turn on by default interleaved access lowering
|
2015-09-01 11:12:35 +00:00 |
vpminmax.ll
|
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vqadd.ll
|
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|
vqdmul.ll
|
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vqshl.ll
|
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vqshrn.ll
|
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vqsub.ll
|
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vrec.ll
|
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vrev.ll
|
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vsel.ll
|
|
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vselect_imax.ll
|
[ARM] Don't pessimize i32 vselect.
|
2015-11-17 17:25:15 +00:00 |
vshift.ll
|
|
|
vshiftins.ll
|
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|
vshl.ll
|
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vshll.ll
|
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vshrn.ll
|
|
|
vsra.ll
|
|
|
vst1.ll
|
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
vst2.ll
|
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
vst3.ll
|
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
vst4.ll
|
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
vstlane.ll
|
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
|
2015-09-30 10:56:37 +00:00 |
vsub.ll
|
|
|
vtbl.ll
|
|
|
vtrn.ll
|
Introduce target hook for optimizing register copies
|
2015-09-24 08:36:14 +00:00 |
vuzp.ll
|
Introduce target hook for optimizing register copies
|
2015-09-24 08:36:14 +00:00 |
vzip.ll
|
Introduce target hook for optimizing register copies
|
2015-09-24 08:36:14 +00:00 |
warn-stack.ll
|
|
|
weak2.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
|
2015-04-16 23:24:18 +00:00 |
weak.ll
|
|
|
widen-vmovs.ll
|
|
|
wrong-t2stmia-size-opt.ll
|
ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2
|
2015-07-21 00:18:59 +00:00 |
zero-cycle-zero.ll
|
[ARM] Mark VMOV with immediate: isAsCheapAsMove.
|
2016-01-13 00:02:40 +00:00 |
zextload_demandedbits.ll
|
|
|